| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2010-01-19 | ruby: new atomics implementation | Derek Hower | |
| This patch changes the way that Ruby handles atomic RMW instructions. This implementation, unlike the prior one, is protocol independent. It works by locking an address from the sequencer immediately after the read portion of an RMW completes. When that address is locked, the coherence controller will only satisfy requests coming from one port (e.g., the mandatory queue) and will ignore all others. After the write portion completed, the line is unlocked. This should also work with multi-line atomics, as long as the blocks are always acquired in the same order. | |||
| 2010-01-19 | merge | Derek Hower | |
| 2009-12-04 | ruby: cleaned up ruby-lang configuration | Derek Hower | |
| 2009-11-18 | m5: refreshed the ruby memtest regression stats | Brad Beckmann | |
| 2009-11-18 | Resurrection of the CMP token protocol to GEM5 | Brad Beckmann | |
| 2009-11-18 | m5: improvements to the ruby_fs.py file | Brad Beckmann | |
| 2009-11-18 | ruby: removed the chip pointer from MessageBuffer | Brad Beckmann | |
| The Chip object no longer exists and thus is removed from the MessageBuffer constructor. | |||
| 2009-11-18 | ruby: added error message to isinstance check | Brad Beckmann | |
| Added error message when a symbol is not an instance of a particular expected type. | |||
| 2009-11-18 | ruby: Added boolean to State Machine parameters | Brad Beckmann | |
| * * * ruby: Removed primitive .hh includes | |||
| 2009-11-18 | m5: Added the default m5out directory to the hg ignore list | Brad Beckmann | |
| 2009-11-18 | ruby: The persistent table files from GEMS | Brad Beckmann | |
| These files are need by the MOESI_CMP_token protocol. | |||
| 2009-11-18 | ruby: MOESI hammer support for DMA reads and writes | Brad Beckmann | |
| 2009-11-18 | ruby: Added a memory controller feature to MOESI hammer | Brad Beckmann | |
| 2009-11-18 | ruby: Hammer ruby configuration support | Brad Beckmann | |
| 2009-11-18 | ruby: Changes necessary to get the hammer protocol to work in GEM5 | Brad Beckmann | |
| 2009-11-18 | ruby: added the original hammer protocols from old ruby | Brad Beckmann | |
| 2009-11-18 | ruby: returns the number of LLC needed for broadcast | Brad Beckmann | |
| Added feature to CacheMemory to return the number of last level caches. This count is need for broadcast protocols such as MOESI_hammer. | |||
| 2009-11-18 | ruby: cache configuration fix to use bytes | Brad Beckmann | |
| Changed cache size to be in bytes instead of kb so that testers can use very small caches and increase the chance of writeback races. | |||
| 2009-11-18 | ruby: fix CacheMemory destructor | Brad Beckmann | |
| 2009-11-18 | ruby: split CacheMemory.hh into a .hh and a .cc | Brad Beckmann | |
| 2009-11-18 | ruby: Added default names to message buffers | Brad Beckmann | |
| Added default names to message buffers created by the simple network. | |||
| 2009-11-18 | ruby: slicc method error fix | Brad Beckmann | |
| Added error message when a method call is not supported by an object. | |||
| 2009-11-18 | ruby: slicc action error fix | Brad Beckmann | |
| Small fix to the State Machine error message when duplicate actions are defined. | |||
| 2009-11-18 | ruby: slicc state machine error fixes | Brad Beckmann | |
| Added error messages when: - a state does not exist in a machine's list of known states. - an event does not exist in a machine - the actions of a certain machine have not been declared | |||
| 2009-11-18 | ruby: Removed unused action z_stall | Brad Beckmann | |
| 2009-11-18 | m5: Added option to take a checkpoint at the end of simulation | Brad Beckmann | |
| 2009-11-18 | m5: Fixed bug in atomic cpu destructor | Brad Beckmann | |
| 2009-11-18 | ruby: fixed dma mi example to work with multiple dma ports | Brad Beckmann | |
| 2009-11-18 | m5: removed master and slave deletions. | Brad Beckmann | |
| The unresolved destructor call caused a seg fault when called. | |||
| 2009-11-18 | m5: fixed destructor to deschedule the tickEvent and event | Brad Beckmann | |
| 2009-11-18 | ruby: getPort function fix | Brad Beckmann | |
| Fixed RubyMemory::getPort function to not pass in a -1 for the idx parameter | |||
| 2009-11-18 | ruby: Fixed Directory memory destructor | Brad Beckmann | |
| 2009-11-18 | m5: Moved profile option since Simulation depends on it. | Brad Beckmann | |
| 2009-11-18 | m5: Added isValidSrc and isValidDest calls to packet.hh | Brad Beckmann | |
| 2009-11-18 | ruby: included ruby config parameter ports per core | Brad Beckmann | |
| Slightly improved the major hack need to correctly assign the number of ports per core. CPUs have two ports: icache + dcache. MemTester has one port. | |||
| 2009-11-18 | ruby: Added error check for openning the ruby config file | Brad Beckmann | |
| 2009-11-18 | ruby: Support for merging ALPHA_FS and ruby | Brad Beckmann | |
| Connects M5 cpu and dma ports directly to ruby sequencers and dma sequencers. Rubymem also includes a pio port so that pio requests and be forwarded to a special pio bus connecting to device pio ports. | |||
| 2009-11-18 | ruby: Added more info to bridge error message | Brad Beckmann | |
| 2009-11-18 | ruby: Ruby 64-bit address output fixes. | Brad Beckmann | |
| 2009-11-18 | ruby: Ruby destruction fix. | Brad Beckmann | |
| 2009-11-18 | ruby: Ruby debug print fixes. | Brad Beckmann | |
| 2009-11-18 | ruby: Ruby memtest python script. | Brad Beckmann | |
| 2009-11-18 | Added tag Calvin_Submission for changeset 5de565c4b7bd | Derek Hower | |
| 2009-11-18 | ruby: added sequencer stats to track what requests are waiting on | Derek Hower | |
| 2009-11-18 | ruby: turned off randomization by default, turned on memory controller ↵ | Derek Hower | |
| random arbitrate | |||
| 2009-11-17 | ARM: Begin implementing CP15 | Ali Saidi | |
| 2009-11-17 | ARM: Differentiate between LDM exception return and LDM user regs. | Ali Saidi | |
| 2009-11-17 | ARM: Boilerplate full-system code. | Ali Saidi | |
| --HG-- rename : src/arch/sparc/interrupts.hh => src/arch/arm/interrupts.hh rename : src/arch/sparc/kernel_stats.hh => src/arch/arm/kernel_stats.hh rename : src/arch/sparc/stacktrace.cc => src/arch/arm/stacktrace.cc rename : src/arch/sparc/system.cc => src/arch/arm/system.cc rename : src/arch/sparc/system.hh => src/arch/arm/system.hh rename : src/dev/sparc/T1000.py => src/dev/arm/Versatile.py rename : src/dev/sparc/t1000.cc => src/dev/arm/versatile.cc rename : src/dev/sparc/t1000.hh => src/dev/arm/versatile.hh | |||
| 2009-11-16 | imported patch isa_fixes2.diff | Ali Saidi | |
| 2009-11-15 | ARM: Make the exception return form of ldm restore CPSR. | Gabe Black | |
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