gem5 - gem5

Age	Commit message (Expand)	Author
2011-02-04	inorder: implement separate fetch unit	Korey Sewell
2011-02-04	inorder: cache port blocking	Korey Sewell
2011-02-04	inorder: stage width as a python parameter	Korey Sewell
2011-02-04	inorder: multi-issue branch resolution	Korey Sewell
2011-02-04	inorder: pipe. stage inst. buffering	Korey Sewell
2011-02-04	inorder: change skidBuffer to list instead of queue	Korey Sewell
2011-02-04	inorder: activity tracking bug	Korey Sewell
2011-02-03	Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from faults.hh.	Gabe Black
2011-02-03	Mem,X86: Make the IO bridge pass APIC messages back towards the CPU.	Gabe Black
2011-02-03	Config: Keep track of uncached and cached ports separately.	Gabe Black
2011-02-02	O3: Fix a style bug in O3.	Gabe Black
2011-02-02	X86: Get rid of the stupd microop.	Gabe Black
2011-02-02	Stats: Update the x86 stats to reflect changing stupd to a store and update.	Gabe Black
2011-02-02	X86: Replace the stupd microop with a store/update sequence.	Gabe Black
2011-02-02	X86: Build O3 by default in SE.	Gabe Black
2011-02-02	Time: Add serialization functions to the Time class.	Gabe Black
2011-02-02	X86: Change how the default disk image gets set up.	Gabe Black
2011-02-01	X86: Add L1 caches for the TLB walkers.	Gabe Black
2011-01-31	Fault: Move the definition of NoFault from faults.hh to fault.hh.	Gabe Black
2011-01-22	refcnt: Change things around so that we handle constness correctly.	Nathan Binkert
2011-01-21	SConstruct: Fix the librt check in SConstruct.	Gabe Black
2011-01-20	checkpointing: fix bug from curTick accessor conversion.	Steve Reinhardt
2011-01-19	TimeSync: Use the new setTick and getTick functions.	Gabe Black
2011-01-19	Time: Add setTick and getTick functions to the Time class.	Gabe Black
2011-01-19	Time: Add a mechanism to prevent M5 from running faster than real time.	Gabe Black
2011-01-18	ARM/O3: Add regressions for ARM w/ O3 CPU.	Ali Saidi
2011-01-18	Stats: Update stats for previous set of patches.	Ali Saidi
2011-01-18	O3: Fix itstate prediction and recovery.	Matt Horsnell
2011-01-18	O3: Fix some variable length instruction issues with the O3 CPU and ARM ISA.	Matt Horsnell
2011-01-18	O3: Don't test misprediction on load instructions until executed.	Matt Horsnell
2011-01-18	O3: Keep around the last committed instruction and use for squashing.	Ali Saidi
2011-01-18	O3: Don't try to scoreboard misc registers.	Ali Saidi
2011-01-18	ARM: The ARM decoder should not panic when decoding undefined holes is arch.	Matt Horsnell
2011-01-18	O3: Fix corner cases where multiple squashes/fetch redirects overwrite timebuf.	Matt Horsnell
2011-01-18	O3: Fix mispredicts from non control instructions.	Matt Horsnell
2011-01-18	O3: Fixes the way prefetches are handled inside the iew unit.	Matt Horsnell
2011-01-18	O3: Support timing translations for O3 CPU fetch.	Ali Saidi
2011-01-18	ARM: Add support for moving predicated false dest operands from sources.	Ali Saidi
2011-01-18	O3: Fixes fetch deadlock when the interrupt clears before CPU handles it.	Min Kyu Jeong
2011-01-18	ARM: Use an actual NOP instead of a instruction that happens to do nothing	Ali Saidi
2011-01-18	ARM: fix mismatched new/delete.	Ali Saidi
2011-01-18	mkblankimage: bash != sh on many systems and this script needs bash	Ali Saidi
2011-01-18	ARM: Add code for a simple bootloader for MP boot.	Ali Saidi
2011-01-18	Unit tests: Convert the refcnttest unit test to use the new EXPECT macros.	Gabe Black
2011-01-18	Unit tests: Define a header file for common unit testing functions/macros.	Gabe Black
2011-01-15	time: improve time datastructure	Nathan Binkert
2011-01-17	Change interface between coherence protocols and CacheMemory	Nilay Vaish
2011-01-15	SPARC: Update stats for the call r15 as source change.	Gabe Black
2011-01-15	SPARC: Adjust the "call" instruction so R15 doesn't get marked as a source.	Gabe Black
2011-01-13	Regression Tests: Update the output for MESI_CMP_directory	Nilay Vaish