summaryrefslogtreecommitdiff
AgeCommit message (Expand)Author
2015-05-05mem: Add missing stats update for uncacheable MSHRsAndreas Hansson
2015-05-05mem: Tidy up BaseCache parametersAndreas Hansson
2015-05-05mem: Remove templates in cache modelDavid Guillen
2015-05-05cpu: Work around gcc 4.9 issues with Num_OpClassesAndreas Hansson
2015-05-05stats: Bring regression stats in line with actual behaviourAndreas Hansson
2015-04-30stats: arm: updatesNilay Vaish
2015-04-29stats: x86: updates due to change in div latencyNilay Vaish
2015-04-29arch, base, dev, kern, sym: FreeBSD supportRuslan Bukin
2015-04-29mem: Simplify page close checks for adaptive policiesRizwana Begum
2015-04-29ruby: set: replace long by unsigned longNilay Vaish
2015-04-29cpu: o3: replace issueLatency with bool pipelinedNilay Vaish
2015-04-29cpu: o3: single cycle default div microop latency on x86Nilay Vaish
2015-04-29x86: change divide-by-zero fault to divide-errorNilay Vaish
2015-04-24misc: Appease gcc 5.1 without moving GDB_REG_BYTESAndreas Hansson
2015-04-23config: enable setting SE-mode environment variables from filebpotter
2015-04-23arm, dev: Add a UFS deviceRene de Jong
2015-04-23arm, dev: Add a NAND flash timing modelRene de Jong
2015-04-23dev: Add support for i2c devicesPeter Enns
2015-04-23misc: Appease gcc 5.1Andreas Hansson
2015-04-22stats: update for previous changesetSteve Reinhardt
2015-04-22cpu: remove conditional check (count > 0) on o3 IQ squashesBrandon Potter
2015-04-22syscall_emul: implement clock_gettime system callBrandon Potter
2015-04-22syscall_emul: update x86 syscall tableMonir Mozumder
2015-04-22syscall_emul: update getrlimit to use warnBrandon Potter
2015-04-22syscall_emul: fix warning with wrong syscall nameBrandon Potter
2015-04-22base: add new ChunkGenerator method to identify last chunkBrandon Potter
2015-04-20stats: update a few stats from long O3 runsSteve Reinhardt
2015-04-20cpu: Remove the InOrderCPU from the treeAndreas Hansson
2015-04-20config: Remove memory aliases and rely on class nameAndreas Hansson
2015-04-15Added tag stable_2015_04_15 for changeset e17949745150Nilay Vaish
2015-04-14stats: x86: changes due to recent patchesNilay Vaish
2015-04-14config, cpu: fix progress interval for switched CPUsMalek Musleh
2015-04-13cpu: re-organizes the branch predictor structure.Dibakar Gope
2015-04-13x86: implements x87 mult/div instructionsNilay Vaish
2015-04-13ruby: allow restoring from checkpoint when using DRAMCtrlLena Olson
2015-04-13sim: Use NULL instead of None for testing filenames.Nilay Vaish
2015-04-13sim: fix function for emulating dup()Nilay Vaish
2015-04-08config: Support full-system with SST's memory systemCurtis Dunham
2015-04-08ext: Add SST connectorCurtis Dunham
2015-04-03stats: updates due to recent changesets.Nilay Vaish
2015-04-03dev: (un)serialize fix for the RTC and RTC Timer Interrupt eventsNikos Nikoleris
2015-04-03sim: correct check for endianessRuslan Bukin
2015-04-03dev: Extend access width for IDE control registersRuslan Bukin
2015-04-03cpu: fix system total instructions accountingNikos Nikoleris
2015-04-03x86: fix debug trace output for mwaitLena Olson
2015-03-27arm, configs: Do not forward snoops from I cacheAndreas Hansson
2015-03-27mem: Support any number of master-IDs in stride prefetcherStephan Diestelhorst
2015-03-27mem: Allocate cache writebacks before new MSHRsAndreas Hansson
2015-03-27mem: Cleanup flow for uncacheable accessesAndreas Hansson
2015-03-27mem: Ignore uncacheable MSHRs when finding matchesAndreas Hansson
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 15:30:18 +0000