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AgeCommit message (Expand)Author
2010-06-02ARM: Implement the unsigned 8 bit and 16 bit vector adds and subtracts.Gabe Black
2010-06-02ARM: Decode the unsigned saturating instructions.Gabe Black
2010-06-02ARM: Implement the unsigned saturating instructions.Gabe Black
2010-06-02ARM: Decode the ssub instructions.Gabe Black
2010-06-02ARM: Implement the ssub instructions.Gabe Black
2010-06-02ARM: Decode the SADD8 and SADD16 instructions.Gabe Black
2010-06-02ARM: Implement the SADD8 and SADD16 instructions.Gabe Black
2010-06-02ARM: Support instructions that set the GE bits when they write the condition ...Gabe Black
2010-06-02ARM: Decode 32 bit thumb data processing register instructions.Gabe Black
2010-06-02ARM: Decode the 16 bit thumb versions of the REV* instructions.Gabe Black
2010-06-02ARM: Decode the ARM version of the REV* instructions.Gabe Black
2010-06-02ARM: Pull decoding of ARM pack, unpack, saturate and reverse instructions int...Gabe Black
2010-06-02ARM: Implement the REV* instructions.Gabe Black
2010-06-02ARM: Add base classes suitable for the REV* instructions.Gabe Black
2010-06-02ARM: Make LDM that loads the PC perform an interworking branch.Gabe Black
2010-06-02ARM: Decode the swp and swpb instructions.Gabe Black
2010-06-02ARM: Implement the swp and swpb instructions.Gabe Black
2010-06-02ARM: Decode MRS and MSR for thumb.Gabe Black
2010-06-02ARM: Replace the versions of MRS and MSR in the ARM decoder with the new ones.Gabe Black
2010-06-02ARM: Define versions of MSR and MRS outside the decoder.Gabe Black
2010-06-02ARM: Hook up the push/pop versions of stm/ldm in thumb.Gabe Black
2010-06-02ARM: Hook SVC into the thumb decoder.Gabe Black
2010-06-02ARM: Implement SVC (was SWI) outside of the decoder.Gabe Black
2010-06-02ARM: Update the stats for the new syscall behavior.Gabe Black
2010-06-02ARM: Trigger system calls from the SupervisorCall invoke method.Gabe Black
2010-06-02ARM: Fix multiply operations.Gabe Black
2010-06-02ARM: Decode the scalar saturating add/subtract instructions.Gabe Black
2010-06-02ARM: Decode the parallel add and subtract instructions.Gabe Black
2010-06-02ARM: Implement signed saturating add and/or subtract instructions.Gabe Black
2010-06-02ARM: Implemented prefetch instructions/decoding (pli, pld, pldw).Gabe Black
2010-06-02ARM: Decode unconditional ARM instructions.Gabe Black
2010-06-02ARM: Make sure ldm exception return writes back its base in the right mode.Gabe Black
2010-06-02ARM: Rework how unrecognized/unimplemented instructions are handled.Gabe Black
2010-06-02ARM: Add support for "SUBS PC, LR and related instructions".Gabe Black
2010-06-02ARM: Make ldrs into the PC and ldm exception return do interworking branches.Gabe Black
2010-06-02ARM: Align the PC when using it as the base for a load.Gabe Black
2010-06-02ARM: Implement ADR as separate from ADD.Gabe Black
2010-06-02ARM: Add support for interworking branch ALU instructions.Gabe Black
2010-06-02ARM: Fix when the flag bits are updated for thumb.Gabe Black
2010-06-02ARM: Don't rely on undefined behavior to get arithmetic right shift.Gabe Black
2010-06-02ARM: Restrict the shift amount from a register to 8 bits.Gabe Black
2010-06-02ARM: Update the stats now that VFP load/store multiple is implemented.Gabe Black
2010-06-02ARM: Define the VFP load/store multiple instructions.Gabe Black
2010-06-02ARM: Decode the VFP load/store multiple instructions.Gabe Black
2010-06-02ARM: Fix the constant describing the number of floating point registers.Gabe Black
2010-06-02ARM: Add templates for VFP load/store multiple instructions.Gabe Black
2010-06-02ARM: Add base classes for VFP load/store multiple.Gabe Black
2010-06-02ARM: Add floating point load/store microops.Gabe Black
2010-06-02ARM: Add an fp version of one of the microop indexed registers.Gabe Black
2010-06-02ARM: Move the mmap region to where Linux actually has it.Gabe Black