Age | Commit message (Expand) | Author |
2018-05-02 | x86: Add a ld/st microop flag for marking an access uncacheable. | Gabe Black |
2018-05-02 | arch-x86: Enable the umask system call | Tony Gutierrez |
2018-04-27 | sim,cpu,mem,arch: Introduced MasterInfo data structure | Giacomo Travaglini |
2018-04-26 | mem-cache: Use block iteration in BaseSetAssoc | Daniel R. Carvalho |
2018-04-20 | docs: Fix power model doxygen | Jason Lowe-Power |
2018-04-19 | mem-cache: Use findBlock in FALRU's block access | Daniel R. Carvalho |
2018-04-19 | mem-cache: Use secure flag in FALRU's findBlock | Daniel R. Carvalho |
2018-04-19 | arch-arm: Add ARMv8.1 TTBR1_EL2 register | Giacomo Travaglini |
2018-04-19 | arch-arm: Fix Unknown Instruction disassemble | Giacomo Travaglini |
2018-04-19 | arch-arm: Change disassemble when MSR to UNKNOWN register | Giacomo Travaglini |
2018-04-18 | mem-cache: Create NRU Replacement Policy | Daniel R. Carvalho |
2018-04-18 | arch-arm: Fix masking in CPACR_EL1 | Chuan Zhu |
2018-04-18 | arch-arm: Mask out unsupported trapped exception handling bits | Chuan Zhu |
2018-04-18 | arch-arm: Fix FPEXC32_EL2 to FPEXC mapping | Chuan Zhu |
2018-04-18 | arch-arm: Adding MiscReg Priv (EL1) global flag | Giacomo Travaglini |
2018-04-18 | arch-arm: Correct masking of cp10 and cp11 in CPACR | Chuan Zhu |
2018-04-18 | arch-arm: Using explicit invalidation in TLB | Giacomo Travaglini |
2018-04-18 | mem-cache: Revamp multiple size tracking for FALRU caches | Nikos Nikoleris |
2018-04-18 | dev, arm: Cleanup Pl050 interrupt handling | Andreas Sandberg |
2018-04-17 | gpu-compute: fix bad asserts in gpu tlb and cu tlb port | Tony Gutierrez |
2018-04-17 | mem-ruby: enable DPRINTFN calls in slicc for temporary debug printing | John Alsop |
2018-04-17 | arch-arm: Fix secure MiscReg access when EL3 is not AArch32 | Giacomo Travaglini |
2018-04-17 | ps2: Unify constant names | Andreas Sandberg |
2018-04-17 | dev, arm: Use the PS/2 framework in the Pl050 model | Andreas Sandberg |
2018-04-17 | ps2: Add proper touchscreen command handling | Andreas Sandberg |
2018-04-17 | ps2: Implement the keyboard reset command | Andreas Sandberg |
2018-04-17 | ps2: Unify device data buffering | Andreas Sandberg |
2018-04-17 | ps2: Add a simple touchscreen model | Andreas Sandberg |
2018-04-17 | ps2: Add VNC support to the keyboard model | Andreas Sandberg |
2018-04-17 | ps2: Factor out PS/2 devices into their own subsystem | Andreas Sandberg |
2018-04-17 | mem: Add a helper function to get a word of variable length | Andreas Sandberg |
2018-04-13 | ruby,gpu-compute: bugfix for GPU_VIPER* protocols | Brandon Potter |
2018-04-13 | ruby: bugfix for MESI_Three_Level protocol | Brandon Potter |
2018-04-13 | mem-ruby: fix more style issues in AMD licenses | Tony Gutierrez |
2018-04-13 | mem-cache: Add MoveToTail to FALRU | Daniel R. Carvalho |
2018-04-12 | configs, mem-ruby: fix issues with style in AMD license | Tony Gutierrez |
2018-04-10 | arch-arm: Fix mrc,mcr to cop14 disassemble | Giacomo Travaglini |
2018-04-10 | dev: arm: SetScaling commands don't send parameter bytes. | Gabe Black |
2018-04-06 | arch: alpha: Fix an 8 year old bug from the transition to pc objects. | Gabe Black |
2018-04-06 | util,arch-arm: Update gen_arm_fs_files.py to use new kernel repos | Pau Cabre |
2018-04-06 | arch-arm: Add support for Tarmac trace generation | Giacomo Travaglini |
2018-04-06 | arch-arm: Add support for Tarmac trace-based simulation | Giacomo Travaglini |
2018-04-06 | arch-arm: Fix AArch32 branch instructions disassemble | Giacomo Travaglini |
2018-04-06 | arch-arm: Fix secure write of SCTLR when EL3 is AArch64 | Giacomo Travaglini |
2018-04-06 | arch-arm: Correct mcrr,mrrc disassemble | Giacomo Travaglini |
2018-04-06 | mem: Remove unused 'using namespace' | Daniel R. Carvalho |
2018-04-06 | mem-cache: Move insertBlock functionality in FALRU | Daniel R. Carvalho |
2018-04-06 | mem-cache: Create LIP Replacement Policy | Daniel R. Carvalho |
2018-04-06 | mem-cache: Create BIP Replacement Policy | Daniel R. Carvalho |
2018-04-05 | mem-cache: Use Packet functions to write data blocks | Daniel R. Carvalho |