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2012-01-17MEM: Remove Port removeConn and MemObject deletePortRefsAndreas Hansson
Cleaning up and simplifying the ports and going towards a more strict elaboration-time creation and binding of the ports.
2012-01-17MEM: Remove the notion of the default portAndreas Hansson
This patch removes the default port and instead relies on the peer being set to NULL initially. The binding check (i.e. is a port connected or not) will eventually be moved to the init function of the modules.
2012-01-17MEM: Simplify ports by removing EventManagerAndreas Hansson
This patch removes the inheritance of EventManager from the ports and moves all responsibility for event queues to the owner. Eventually the event manager should be the interface block, which could either be the structural owner or a subblock like a LSQ in the O3 CPU for example.
2012-01-17CPU: Moving towards a more general port across CPU modelsAndreas Hansson
This patch performs minimal changes to move the instruction and data ports from specialised subclasses to the base CPU (to the largest degree possible). Ultimately it servers to make the CPU(s) have a well-defined interface to the memory sub-system.
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
Port proxies are used to replace non-structural ports, and thus enable all ports in the system to correspond to a structural entity. This has the advantage of accessing memory through the normal memory subsystem and thus allowing any constellation of distributed memories, address maps, etc. Most accesses are done through the "system port" that is used for loading binaries, debugging etc. For the entities that belong to the CPU, e.g. threads and thread contexts, they wrap the CPU data port in a port proxy. The following replacements are made: FunctionalPort > PortProxy TranslatingPort > SETranslatingPortProxy VirtualPort > FSTranslatingPortProxy --HG-- rename : src/mem/vport.cc => src/mem/fs_translating_port_proxy.cc rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
2012-01-17Ruby: Change the access permissions for MOESI hammerAndreas Hansson
Regression statistics update.
2012-01-17Ruby: Change the access permissions for MOESI hammerAndreas Hansson
This patch changes the access permission for the WB_E_W state from Busy to Read_Write to avoid having issues in follow-on patches with functional accesses going through Ruby. This change was made after consultation with all involved parties and is more of a work-around than a fix.
2012-01-17MEM: Add the system port as a central access pointAndreas Hansson
The system port is used as a globally reachable access point to the memory subsystem. The benefit of using an actual port is that the usual infrastructure is used to resolve any access and thus makes the overall system able to handle distributed memories in any configuration, and also makes the accesses agnostic to the address map. This patch only introduces the port and does not actually use it for anything.
2012-01-17MEM: Differentiate functional cache accesses from CPU and memoryAndreas Hansson
This patch changes the functionalAccess member function in the cache model such that it is aware of what port the access came from, i.e. if it came from the CPU side or from the memory side. By adding this information, it is possible to respect the 'forwardSnoops' flag for snooping requests coming from the memory side and not forward them. This fixes an outstanding issue with the IO bus getting accesses that have no valid destination port and also cleans up future changes to the bus model.
2012-01-16stats: undo parser change from initparam changeAli Saidi
2012-01-16Alpha: warn_once about broken PAL breakpoints.Steve Reinhardt
A recent changeset (aae12ce9f34c) removed support for PAL-mode breakpoints in Alpha, since it was awkward and likely unused. This patch lets a user know if they potentially run into this limitation.
2012-01-16debug: fix AllFlags::disable()Steve Reinhardt
Looks like copy-and-paste bug, apparently I'm the first person to ever use this since it's plainly broken.
2012-01-12inorder: MDU deadlock fixMaximilien Breughe
2012-01-12mips: compatibility between MIPS_SE and cross compiler from CodeSorceryDeyuan Guo
2012-01-12mips: Fix bugs in faults.cc/hh and tlb.cc for MIPS_FSDeyuan Guo
2012-01-12mips: Fix decoder of two float-convert instructionsDeyuan Guo
2012-01-12mips: definition of MIPS64_QNAN in registers.hhDeyuan Guo
2012-01-12PerfectCacheMemory: Remove references to CacheMsgNilay Vaish
The definition for the class CacheMsg was removed long back. Some declaration had still survived, which was recently removed. Since the PerfectCacheMemory class relied on this particular declaration, its absence let to compilation breaking down. Hence this patch.
2012-01-11Packet: Put back part of the assertAli Saidi
2012-01-11Packet: Remove meaningless assert statementAli Saidi
2012-01-11Ruby: Use map option for selecting b/w sparse and memory vectorNilay Vaish
2012-01-11Config: Add support for restoring using a timing CPUNilay Vaish
Currently there is an assumption that restoration from a checkpoint will happen by first restoring to an atomic CPU and then switching to a timing CPU. This patch adds support for directly restoring to a timing CPU. It adds a new option '--restore-with-cpu' which is used to specify the type of CPU to which the checkpoint should be restored to. It defaults to 'atomic' which was the case before.
2012-01-11Ruby: Resurrect Cache Warmup CapabilityNilay Vaish
This patch resurrects ruby's cache warmup capability. It essentially makes use of all the infrastructure that was added to the controllers, memories and the cache recorder.
2012-01-11Ruby Debug Flags: Remove one, add anotherNilay Vaish
The flag RubyStoreBuffer is being removed, instead RubySystem is being added
2012-01-11Ruby Port: Add a list of cpu ports attached to this portNilay Vaish
2012-01-11Ruby EventQueue: Remove unused functionsNilay Vaish
2012-01-11Ruby Sparse Memory: Add function for collating blocksNilay Vaish
This patch adds function to the Sparse Memory so that the blocks can be recorded in a cache trace. The blocks are added to the cache recorder which can later write them into a file.
2012-01-11Ruby: Add infrastructure for recording cache contentsNilay Vaish
This patch changes CacheRecorder, CacheMemory, CacheControllers so that the contents of a cache can be recorded for checkpointing purposes.
2012-01-11Ruby Memory Vector: Functions for collating and populating pagesNilay Vaish
This patch adds functions to the memory vector class that can be used for collating memory pages to raw trace and for populating pages from a raw trace.
2012-01-10Ruby: remove the files related to the tracerNilay Vaish
The Ruby Tracer is out of date with the changes that are being carried out to support checkpointing. Hence, it needs to be removed.
2012-01-10hgfilesize: skip files that have been removedNathan Binkert
2012-01-10MOESI Hammer: Update regression test outputNilay Vaish
2012-01-10MOESI Hammer: Remove a couple of bugsNilay Vaish
A couple of bugs were observed while building checkpointing support in Ruby. This patch changes transitions to remove those errors.
2012-01-10Sparse Memory: Simplify the structure for an entryNilay Vaish
The SparseMemEntry structure includes just one void* pointer. It seems unnecessary that we have a structure for this. The patch removes the structure and makes use of a typedef on void* instead.
2012-01-10Automated merge with ssh://repo.gem5.org/gem5Ali Saidi
2012-01-10config: Fix json output for Python lt 2.6.Ali Saidi
2012-01-10DPRINTF: Improve some dprintf messages.Nilay Vaish
2012-01-10X86 Regressions: Update stats due to fence instructionNilay Vaish
2012-01-09X86: Add memory fence to I/O instructionsNilay Vaish
2012-01-10Config: Remove short option string for cpu typeNilay Vaish
2012-01-09CPU: Remove Alpha-specific PC alignment check.Anders Handler
2012-01-09Config: Fix issue with JSON outputAli Saidi
2012-01-09Packet: Add derived class FunctionalPacket to enable partial functional readsGeoffrey Blake
This adds the derived class FunctionalPacket to fix a long standing deficiency in the Packet class where it was unable to handle finding data to partially satisfy a functional access. Made this a derived class as functional accesses are used only in certain contexts and to not add any additional overhead to the existing Packet class.
2012-01-09stats: fix Vector2d to display stats correctly when y_subname is not specified.Dam Sunwoo
Vector2d stats with no y_subname were not displayed as the VectorPrint subname was not initialized correctly to reflect the empty field.
2012-01-09sim: Enable sampling of run-time for code-sections marked using pseudo insts.Prakash Ramrakhyani
This patch adds a mechanism to collect run time samples for specific portions of a benchmark, using work_begin and work_end pseudo instructions.It also enhances the histogram stat to report geometric mean.
2012-01-09O3: Remove some asserts that no longer seem to be valid.Ali Saidi
2012-01-09config: support outputing a pickle of the configuration treeAli Saidi
2012-01-09mem: Change DPRINTF prints more useful destination port number.Min Kyu Jeong
Old code prints 0 for destination since pkt->getDest() returns 0 for pkt->getDest() == Packet::Broadcast, which is always true.
2012-01-09O3: Add support of function tracing with O3 CPU.Ali Saidi
2012-01-09ARM: Add support for running multiple systemsAli Saidi
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