gem5 - gem5

Age	Commit message (Expand)	Author
2011-03-25	Arm: Add in a missing miscRegName.	Gabe Black
2011-03-24	Arm: Get rid of unused and incomplete setCp15Register and readCp15Register.	Gabe Black
2011-03-24	Arm: Get rid of the unused copyStringArray32 method from Arm process classes.	Gabe Black
2011-03-24	ISA parser: Set up op_src_decl and op_dest_decl for pc operands.	Gabe Black
2011-03-22	This patch fixes a build error in networktest.cc that occurs with gcc4.2	Tushar Krishna
2011-03-22	Ruby: Remove CacheMsg class from SLICC	Nilay Vaish
2011-03-21	This patch makes garnet use the info about active and inactive vnets during a...	Tushar Krishna
2011-03-21	fix garnet fleible pipeline	Tushar Krishna
2011-03-21	This patch adds the network tester for simple and garnet networks.	Tushar Krishna
2011-03-20	SLICC: Remove WakeUp* import calls from ast/__init__.py	Nilay Vaish
2011-03-19	configs: combine ruby_se.py and se.py to avoid all that code duplication	Lisa Hsu
2011-03-19	enable x86 workloads on se.py	Lisa Hsu
2011-03-19	se.py: Modify script to make multiprogramming much easier.	Lisa Hsu
2011-03-19	util: update aggregator to handle x86 checkpoints.	Lisa Hsu
2011-03-19	Ruby: Convert CacheRequestType to RubyRequestType	Nilay Vaish
2011-03-19	Ruby: Convert AccessModeType to RubyAccessMode	Nilay Vaish
2011-03-19	MOESI_hammer: minor fixes to full-bit dir	Brad Beckmann
2011-03-19	Ruby: dma retry fix	Brad Beckmann
2011-03-19	RubyPort: minor fixes to trace flag and dprintfs	Brad Beckmann
2011-03-19	ruby: added useful dma progress dprintf	Brad Beckmann
2011-03-19	slicc: improved invalid transition message	Brad Beckmann
2011-03-19	MOESI_hammer: fixed dma bug with shared data	Brad Beckmann
2011-03-19	MOESI_CMP_directory: significant dma bug fixes	Brad Beckmann
2011-03-18	SLICC: Remove external_type for structures	Nilay Vaish
2011-03-18	SLICC: Remove the keyword wake_up_dependents	Nilay Vaish
2011-03-18	SLICC: Remove the keyword wake_up_all_dependents	Nilay Vaish
2011-03-18	swig: get rid of m5.internal.random module (swig/random.i)	Steve Reinhardt
2011-03-18	base: disable FastAlloc in debug builds by default	Steve Reinhardt
2011-03-17	Automated merge with ssh://hg@repo.m5sim.org/m5	Ali Saidi
2011-03-17	ARM: Update stats for the previous changes and add ARM_FS/O3 regression.	Ali Saidi
2011-03-17	ARM: Add minimal ARM_SE support for m5threads.	Chris Emmons
2011-03-17	ARM: Fix subtle bug in LDM.	Ali Saidi
2011-03-17	ARM: Implement the Instruction Set Attribute Registers (ISAR).	Ali Saidi
2011-03-17	ARM: Identify branches as conditional or unconditional and direct or indirect.	Ali Saidi
2011-03-17	ARM: Bare metal system should have 256MB of RAM.	Ali Saidi
2011-03-17	ARM: Fix small bug with VLDM/VSTM instructions.	Ali Saidi
2011-03-17	ARM: Detect and skip udelay() functions in linux kernel.	Ali Saidi
2011-03-17	ARM: Allow conditional quiesce instructions.	Ali Saidi
2011-03-17	Stats: Update the statistics for rfe patch.	Ali Saidi
2011-03-17	ARM: Fix RFE macrop.	Matt Horsnell
2011-03-17	ARM: Rename registers used as temporary state by microops.	Matt Horsnell
2011-03-17	O3: Send instruction back to fetch on squash to seed predecoder correctly.	Ali Saidi
2011-03-17	O3: Cleanup the commitInfo comm struct.	Ali Saidi
2011-03-17	ARM: Previous change didn't end up setting instFlags, this does.	Ali Saidi
2011-03-17	O3: Update regressions for mem block caching change.	Ali Saidi
2011-03-17	Mem: Fix issue with dirty block being lost when entire block transferred to n...	Ali Saidi
2011-03-17	O3: Fix unaligned stores when cache blocked	Ali Saidi
2011-03-17	Ruby: minor bugfix, line did not adhere to some macro usage conventions.	Lisa Hsu
2011-03-17	Ruby: expose a simple mod function in slicc interface.	Lisa Hsu
2011-03-17	X86: Update the stats for parser on x86 O3.	Ali Saidi