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2017-04-05stats: Update SPARC solaris boot stats.Gabe Black
The CPU power state bins where changed by the following CL: commit fb5fc11da49938660ea22c336964677cdba890e1 Author: David Guillen Fandos <david.guillen@arm.com> Date: Mon Jun 6 17:16:43 2016 +0100 pwr: Low-power idle power state for idle CPUs Change-Id: I8b3924681c8a85b7bbe061b671faf274ce882f91 Reviewed-on: https://gem5-review.googlesource.com/2644 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-04-05stats: Remove stats from the SPARC solaris boot which were silenced.Gabe Black
These were silenced in: commit d4342aff4ce347ad8ab5a01fdd41993106cd3ece Author: Andreas Sandberg <andreas.sandberg@arm.com> Date: Mon Jun 6 17:16:43 2016 +0100 stats: Silence unused power stats Change-Id: I273e8190b76335505bedfea88ef89abee1739b8a Reviewed-on: https://gem5-review.googlesource.com/2643 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-04-05stats: Add a boat load of stats to the SPARC solaris boot regression.Gabe Black
A large number of stats were added by the following change: commit 5350879f499470a2683dfec6cff021dd7ac20fa6 Author: David Guillen Fandos <david.guillen@arm.com> Date: Mon Jun 6 17:16:43 2016 +0100 pwr: Add power states to ClockedObject Change-Id: Iec32bb7f701db0a09be26fe5ffb2812385f972c2 Reviewed-on: https://gem5-review.googlesource.com/2642 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-04-05stats: Un-empty the SPARC FS stats.txt file.Gabe Black
This was emptied accidentally by the CL below. A lot of other files were too, but those were eventually refilled. commit 62b6ff22ec1f90014b1d0fc778014bdb38cc09ce Author: Curtis Dunham <Curtis.Dunham@arm.com> Date: Tue May 31 11:07:18 2016 +0100 stats: update for snoop filter tweak Change-Id: I34aefca51a92a6a98f6a8fdbdab7106cc1fff171 Reviewed-on: https://gem5-review.googlesource.com/2641 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-04-05scons: Fix hook installation error caused by stale cacheAndreas Sandberg
Due to the way SCons caches some file system state internally, it sometimes "remembers" that a file or directory didn't exist at some point. The git hook installation script sometimes needs to create a hooks directory in the repository. Due to the cached state of the hooks directory, the build system tries to create it twice. The second mkdir operation leads to an error since the directory already exists. Fix this issue by clearing the cached state of the hooks directory after creating it. Change-Id: I3f67f75c06ef928b439a0742f7619b7e92ed093b Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2660 Reviewed-by: Gabe Black <gabeblack@google.com>
2017-04-03arm, kvm: implement GIC state transferCurtis Dunham
This also allows checkpointing of a Kvm GIC via the Pl390 model. Change-Id: Ic85d81cfefad630617491b732398f5e6a5f34c0b Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2444 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-04-03arm, dev: add basic support for GICC_BPR registerCurtis Dunham
The Binary Point Register (BPR) specifies which bits belong to the group priority field (which are used for preemption) and which to the subpriority field (which are ignored for preemption). Change-Id: If51e669d23b49047b69b82ab363dd01a936cc93b Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2443 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-04-03arm, dev: refactor GIC Pl390 GICD_ITARGETSRn handlingCurtis Dunham
The aforementioned registers (Interrupt Processor Targets Registers) are banked per-CPU, but are read-only. This patch eliminates the per-CPU storage of these values that are simply computed. Change-Id: I52cafc2f58e87dd54239a71326c01f4923544689 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2442 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-04-03arm: refactor packet processing in Pl390 GICCurtis Dunham
Change-Id: I696703418506522ba90df5c2c4ca45c95a6efbea Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2441 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-04-03arm: Don't panic when checking coprocessor read/write permissionsNikos Nikoleris
Instructions that use the coprocessor interface check the current program status to determine whether the current context has the priviledges to read from/write to the coprocessor. Some modes allow the execution of coprocessor instructions, some others do not allow it, while some other modes are unexpected (e.g., executing an AArch32 instruction while being in an AArch64 mode). Previously we would unconditionally trigger a panic if we were in an unexpected mode. This change removes the panic and replaces it with an Undefined Instruction fault that triggers if and when a coprocessor instruction commits in an unexpected mode. This allows speculative coprocessor instructions from unexpected modes to execute but prevents them from gettting committed. Change-Id: If2776d5bae2471cdbaf76d0e1ae655f501bfbf01 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Rekai Gonzalez Alberquilla <rekai.gonzalezalberquilla@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2281 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-04-03arm: Treat Write-Through Normal memory as Non-CacheableNikos Nikoleris
A completed write to a memory location that is Write-Through Cacheable has to be visible to an external observer without the need of explicit cache maintenance. This change adds support for Write-Through Cacheable Normal memory and treats it as Non-cacheable. This incurs a small penalty as accesses to the memory do not fill in the cache but does not violate the properties of the memory type. Change-Id: Iee17ef9d952a550be9ad660b1e60e9f6c4ef2c2d Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2280 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-04-03sim: Handle cases where Drainable::resume() creates objectsAndreas Sandberg
There are cases where Drainable objects need to create new objects in Drainable::resume(). In such cases, the local drain state will be inherited from the DrainManager. We currently set the state to Running as soon as we start resuming the simulator. This means that new objects are created in the Running state rather than the Drained state, which the resume code assumes. Depending on the traversal order in DrainManager::resume(), this sometimes triggers a panic because the object being resumed is in the wrong state. This change introduces a new drain state, Resuming, that the DrainManager enters as soon as it starts resuming the simulator. Objects that are created while resuming are created in this state. Such objects are then resumed in a subsequent pass over the list of Drainable objects that need to be resumed. Once all objects have been resumed, the simulator enters the Running state. Change-Id: Ieee8645351ffbdec477e9cd2ff86fc795e459617 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2600 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-04-03config, arm: Add multi-core KVM support to bL configAndreas Sandberg
Add support for KVM in the big.LITTLE(tm) example configuration. This replaces the --atomic option with a --cpu-type option that can be used to switch between atomic, kvm, and timing simulation. When running in KVM mode, the simulation script automatically assigns separate event queues (threads) to each of the simulated CPUs. All simulated devices, including CPU child devices (e.g., interrupt controllers and caches), are assigned to event queue 0. Change-Id: Ic9a3f564db91f5a3d3cb754c5a02fdd5c17d5fdf Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2561 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-04-03config, arm: Unify checkpoint path handling in bL configsAndreas Sandberg
The vanilla bL configuration file and the dist-gem5 configuration file use slightly different code paths when restoring from checkpoints. Unify this by passing the parsed options to the instantiate() method and adding an optional checkpoint keyword argument for checkpoint directories (only used by the dist-gem5 script). Change-Id: I9943ec10bd7a256465e29c8de571142ec3fbaa0e Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2560 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-04-03arm, kvm: Override the kernel's default MPIDR valueAndreas Sandberg
The kernel and gem5 derive MPIDR values from CPU IDs in slightly different ways. This means that guests running in a multi-CPU setup sometimes fail to bring up secondary CPUs. Fix this by overriding the MPIDR value in virtual CPUs just after they have been instantiated. Change-Id: I916d44978a9c855ab89c80a083af45b0cea6edac Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2461 Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-04-03dev, arm: Fix multi-core KVM race in the generic timerAndreas Sandberg
The generic timer sometimes needs to access global state. This can lead to race conditions when simulating a multi-core KVM system where each core lives in its own thread. In that case, the setMiscReg and readMiscReg methods are called from the thread owning the CPU and not the global device thread. Change-Id: Ie3e982258648c8562cce0b30a0c122dfbfaf42cd Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2460 Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-04-03dev: Align BAR0 size to power of 2 for VirtIO devicesSascha Bischoff
When setting the size of a PCI BAR, the kernel only supports powers of two (as per the PCI spec). Previously, the size was incorrectly read by the kernel, and the address ranges assigned to the PCI devices could overlap, resulting in gem5 crashes. We now round up to the next power of two. Kudos to Sergei Trofimov who helped to debug this issue! Change-Id: I54ca399b62ea07c09d4cd989b17dfa670e841bbe Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com> Reviewed-by: Sergei Trofimov <sergei.trofimov@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2580 Reviewed-by: Paul Rosenfeld <prosenfeld@micron.com>
2017-04-03dev: Add a dummy VirtIO deviceAndreas Sandberg
VirtIO transport interfaces always expect a VirtIO device pointer. However, there are cases (in particular when using VirtIO's MMIO interface) where we want to instantiate an interface without a device. Add a dummy device using VirtIO device ID 0 and no queues to handle this use case. Change-Id: I6cbe12fd403903ef585be40279c3b1321fde48ff Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com> Reviewed-by: Rekai Gonzalez Alberquilla <rekai.gonzalezalberquilla@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2325 Reviewed-by: Weiping Liao <weipingliao@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-04-03dev: Rename VirtIO PCI debug flagAndreas Sandberg
Rename VIOPci -> VIOIface to avoid having a separate flag for the MMIO interface. Change-Id: I99f9210fa36ce33662c48537fd3992cd9a69d349 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Rekai Gonzalez Alberquilla <rekai.gonzalezalberquilla@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2324 Reviewed-by: Weiping Liao <weipingliao@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-04-03arm: fix template instantiation warning in clangMatteo Andreozzi
In arch/arm/faults.hh, template the static member vals require explicit specialisation to avoid compiler warnings. Change-Id: Ie404ccaa43269cb1bb819e33153e776abbf3a79b Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-03-26scons: Collapse symlinks when installing git hooks.Gabe Black
When naively computing the relative path between the git hooks directory and a hook we want to install, that will generally start with a few ".." path components to work back out of the .git directory into the working directory.' If the hooks directory is actually a symlink, then following ".." directory entries won't get us back to where we came from, they'll take us to the actual parent directory of hooks. The relative path we computed would then try to go forward from this other directory using a path that would have worked in the working directory, hopefully going somewhere that doesn't exist, but potentially going to a totally unrelated file with the same relative path. To avoid this problem, we should expand any symlinks in both the hooks directory path, and the path to the hook script. That way, any ".." components will go where we'd expect them to, and the relative path will actually go from hooks to the script we expect. Change-Id: I64d51bc817351f89b1d60eceaf450cc0a4553415 Reviewed-on: https://gem5-review.googlesource.com/2542 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-03-26scons: Use a relative symlink for git hooks more selectively.Gabe Black
If the hooks directory is a symlink, then there are at least two possible scenarios to consider when installing a hook which is itself a symlink. The first is that hooks is a relative symlink, and so is likely intended to stay in place relative to .git and the git working directory. In that case, it's ok for the symlinks inside of hooks to be relative to the working directory too, since they should also stay in place relatively speaking. The second situation is that the symlink is absolute. In that case, moving the git working directory will move the hook relative to the hook directory, and any relative symlink will become broken. In that case, the hook symlink needs to be absolute. The same logic likely applies to the .git directory itself, although I haven't run into a situation in practice where the .git directory is actually a symlink. Change-Id: I047aa198094dd0fd5a841417d93b211ece02783f Reviewed-on: https://gem5-review.googlesource.com/2541 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-03-26scons: Detect and remove broken git hook symlinks.Gabe Black
When installing a git hook, it's possible for the hook to not "exist" if it's actually a symlink which points to a file that doesn't exist. Trying to create a new symlink in its place without first removing the old one causes a build failure in these cases. If the hook doesn't "exist" but is still a link, that means it's actually a broken link and should be deleted by the hook installation function before any new symlink is created. Change-Id: I59aa51feb5bd74ca33e51e89cde2ceabeb41bd76 Reviewed-on: https://gem5-review.googlesource.com/2540 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-03-24scons: Stop generating an a.out checking the "as" version.Gabe Black
Change-Id: I71d07fc64bdb3c6c3e93e2a1fd358cc899a70678 Reviewed-on: https://gem5-review.googlesource.com/2500 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-03-21arm: correct register read bug in Pl390 GICCurtis Dunham
Change-Id: I4c0de7c2a5b40c1a9f009ca12062cb108b450b04 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-03-21python: Automatically disable listeners in batch setupsAndreas Sandberg
Determine if gem5 is running in a batch environment by checking if STDIN is wired to a TTY or not. If the simulator is running in a batch environment, disable all listeners by default. This behavior can be overridden using the --enable-listeners option. Change-Id: I404c709135339144216bf08a2769c016c543333c Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Sean McGoogan <sean.mcgoogan@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2322 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-03-21util: Add a tool to list outgoing/incoming changesAndreas Sandberg
Add a small Python script that uses Gerrit's Change-Id: tags to list incoming and outgoing changes. Change-Id: Iea1757b2d64a57a4c7b4e47718cfcaa725a99615 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2329 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-03-20misc: add copyright/name information for contributionPierre-Yves Péneau
Change-Id: I9242ce50b86b02ec1880d411627da11265cb8961 Signed-off-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr> Reviewed-on: https://gem5-review.googlesource.com/2328 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-03-17syscall-emul: Hotfix for FreeBSD/Mac buildsBrandon Potter
The clone system call added in 236719892 relies on header files from Linux systems. Obviously, this prevents compilation for anyone using FreeBSD or Mac to compile the simulator. This changeset is meant as a temporary fix to allow builds on non-Linux systems until a proper solution is found. Change-Id: I404cc41c588ed193dd2c1ca0c1aea35b0786fe4e Reviewed-on: https://gem5-review.googlesource.com/2420 Maintainer: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-03-17syscall-emul: change NULL to nullptr in Process filesBrandon Potter
Change-Id: I9ff21092876593237f919e9f7fb7283bd865ba2e Reviewed-on: https://gem5-review.googlesource.com/2421 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com>
2017-03-16cpu: Print progress messages in Trace CPURadhika Jagtap
This change adds the ability to print a message at intervals of committed instruction count to indicate progress in the trace replay. Change-Id: I8363502354c42bfc52936d2627986598b63a5797 Reviewed-by: Rekai Gonzalez Alberquilla <rekai.gonzalezalberquilla@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2321 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-03-16tests: Warn not fail when reading invalid pickle status filesNikos Nikoleris
With this change, the test script will output a warning when it reads an incomplete (e.g., when a regression is still running) or corrupt status file instead of throwing an exception. When the scipt is used to show the results the corrupt file is skipped; when it is used to test if all regressions run successfully it will return an error value (2). Change-Id: Ie7d9b457b200e3abc7ae6238e3efbf3d18cf4297 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2320 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-03-15arm, dev: Add missing override in the Pl390 GIC modelAndreas Sandberg
The Pl390::getAddrRanges() method should have been flagged using the override keyword. Other methods in this class already use the override keyword, so this results in a warning about inconsistent override usage when compiling using clang. Change-Id: I17449687a8e074262232562487b58c96466bd54e Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-03-13dev, arm: Add draining to the GIC modelAndreas Sandberg
The GIC model currently adds a delay to interrupts when posting them to a target CPU. This means that an interrupt signal will be represented by an event for a short period of time. We currently ignore this when draining and serialize the tick when the interrupt will fire. Upon loading the checkpoint, the simulated GIC reschedules the pending events. This behaviour is undesirable when we implement support for switching between in-kernel GIC emulation and gem5 GIC emulation. In that case, the (kernel) GIC model gets a lot simpler if we don't need to worry about in-flight interrupts from the gem5 GIC. This changeset adds a draining check to force the GIC into a state where all interrupts have been delivered prior to checkpointing/CPU switching. It also removes the now redundant serialization of interrupt events. Change-Id: I8b8b080aa291ca029a3a7bdd1777f1fcd5b01179 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2331 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-03-13arm: Clean up the GIC implementationAndreas Sandberg
Lots of minor cleaups: * Make cached params const * Don't serialize params * Use AddrRange to represent the distributor and CPU address spaces * Store a const AddrRangeList of all PIO ranges Change-Id: I40a17bc3a38868fb3b8af247790e852cf99ddf1d Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2330 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-03-09style: change NULL to nullptr in syscall filesBrandon Potter
Change-Id: I02719f3572f6665cace1eb5681f297dcde9e71ce Reviewed-on: https://gem5-review.googlesource.com/2271 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-03-09syscall-emul: Ignore unimplemented system callsBrandon Potter
This changeset sets the implementation policy for a subset of system calls to the ignoreFunc implementation (for x86 only). The ignored system calls likely will never be implemented and this allows a warning to be issued instead of the simulation exiting with a fatal. Change-Id: I8d9741ad683151e88cc71156d3602e2d0ccb0acf Reviewed-on: https://gem5-review.googlesource.com/2270 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-03-09syscall-emul: Rewrite system call exit codeBrandon Potter
The changeset does a major refactor on the exit, exit_group, and futex system calls regarding exit functionality. A FutexMap class and related structures are added into a new file. This increases code clarity by encapsulating the futex operations and the futex state into an object. Several exit conditions were added to allow the simulator to end processes under certain conditions. Also, the simulation only exits now when all processes have finished executing. Change-Id: I1ee244caa9b5586fe7375e5b9b50fd3959b9655e Reviewed-on: https://gem5-review.googlesource.com/2269 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-03-09syscall-emul: Add the tgkill system callBrandon Potter
This changeset adds support to kill a thread group by calling the tgkill system call. The functionality is needed in some pthread applications. Change-Id: I0413a3331be69b74dfab30de95384113ec4efb63 Reviewed-on: https://gem5-review.googlesource.com/2268 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>
2017-03-09syscall-emul: Adds SE mode signal featureBrandon Potter
This changeset adds a simple class definition and a member in the System object to track signals sent between processes. The implementation cannot support all signals that might be sent between processes, but it can support some of the simple use cases like SIGCHLD. Change-Id: Id5f95aa60e7f49da1c5b5596fbfa26e729453ac7 Reviewed-on: https://gem5-review.googlesource.com/2267 Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-03-09syscall-emul: Add or extend dup, dup2, and pipeBrandon Potter
This changeset extends the pipe system call to work with architectures other than Alpha (and enables the syscall for x86). For the dup system call, it sets the clone-on-exec flag by default. For the dup2 system call, the changeset adds an implementation (and enables it for x86). Change-Id: I00ddb416744ee7dd61a5cd02c4c3d97f30543878 Reviewed-on: https://gem5-review.googlesource.com/2266 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>
2017-03-09syscall-emul: Add functionality to open syscallsBrandon Potter
This changeset adds refactors the existing open system call, adds the openat variant (enabled for x86 builds), and adds additional "special file" test cases for /proc/meminfo and /etc/passwd. Change-Id: I6f429db65bbf2a28ffa3fd12df518c2d0de49663 Reviewed-on: https://gem5-review.googlesource.com/2265 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>
2017-03-09style: Correct some style issuesBrandon Potter
This changeset fixes line alignment issues, spacing, spelling, etc. for files that are used during SE Mode. Change-Id: Ie61b8d0eb4ebb5af554d72f1297808027833616e Reviewed-on: https://gem5-review.googlesource.com/2264 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr>
2017-03-09syscall-emul: Move memState into its own fileBrandon Potter
The Process class is full of implementation details and structures related to SE Mode. This changeset factors out an internal class from Process and moves it into a separate file. The purpose behind doing this is to clean up the code and make it a bit more modular. Change-Id: Ic6941a1657751e8d51d5b6b1dcc04f1195884280 Reviewed-on: https://gem5-review.googlesource.com/2263 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-03-09misc: add missing copyright/author information in previous commitPierre-Yves Péneau
See a06a46f and a854373. Change-Id: Id66427db22b7d7764c218b9cd78d95db929f4127 Signed-off-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr> Reviewed-on: https://gem5-review.googlesource.com/2224 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-03-09ruby: fix MOESI_hammer directory to work with > 3GB memoryLena Olson
The MOESI_hammer directory assumes a contiguous address space, but X86 has an IO gap from 3-4GB. This patch allows the directory to work with more than 3GB of memory on X86. Assumptions: the physical address space (range of possible physical addresses) is 0-XGB when X <= 3GB, and 0-(X+1)GB when X > 3GB. If there is no IO gap this patch should still work. Change-Id: I5453a09e953643cada2c096a91d339a3676f55ee Reviewed-on: https://gem5-review.googlesource.com/2169 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-03-09ruby: fix and/or precedence in sliccLena Olson
The slicc compiler currently treats && and || with the same precedence. This is highly non-intuitive to people used to C, and was probably an error. This patch makes && bind tighter than ||. For example, previously: if (A || B && C) compiled to: if ((A || B) && C) With this patch, it compiles to: if (A || (B && C)) Change-Id: Idbbd5b50cc86a8d6601045adc14a253284d7b791 Signed-off-by: Lena Olson (leolson@google.com) Reviewed-on: https://gem5-review.googlesource.com/2168 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Joe Gross <criusx@gmail.com> Reviewed-by: Sooraj Puthoor <puthoorsooraj@gmail.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Conflicts: COPYING
2017-03-09misc: Add a CONTRIBUTING documentJason Lowe-Power
This document details how to contribute to gem5 based on our new contribution flow with git and gerrit. Change-Id: I0a7e15fd83a3ee3ab6c85c1192f46f1e1d33b7c2 Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: http://reviews.gem5.org/r/3814/ Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Pierre-Yves Peneau <pierre-yves.peneau@lirmm.fr> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Brad Beckmann <brad.beckmann@amd.com> Reviewed-by: Ali Saidi <Ali.Saidi@ARM.com>
2017-03-07gpu-compute: Fix Python/C++ object hierarchy discrepanciesAndreas Sandberg
The GPUCoalescer and the Shader classes have different base classes in C++ and Python. This causes subtle bugs in SWIG and compilation errors for PyBind. Change-Id: I1ddd2a8ea43f083470538ddfea891347b21d14d8 Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2228 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr> Reviewed-by: Bradford Beckmann <brad.beckmann@amd.com>
2017-03-07power: Avoid forward declarations that confuse wrappersAndreas Sandberg
The Python wrappers get confused by the forward declarations in the power framework. This changeset restructures the code slightly to avoid the troublesome forward declarations. Change-Id: Id8c93224f1988edb5fdf9d3abc6237f2f688c02d Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2227 Reviewed-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>