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AgeCommit message (Expand)Author
2017-10-31config: Rework the SysPaths functions into functors.Gabe Black
2017-10-31dev: Using Configurable image writer in HDLcdGiacomo Travaglini
2017-10-31vnc: Default image writer type set to AutoGiacomo Travaglini
2017-10-31base: Introducing utility for writing raw data in png formatGiacomo Travaglini
2017-10-31x86: Fix VEX instruction decoding.Gabe Black
2017-10-30base: Fix forcing loopback only binding for listeners.Gabe Black
2017-10-20arch-arm: RBIT instruction using mirroring funcGiacomo Travaglini
2017-10-20base: Function for mirroring bits in variable length wordGiacomo Travaglini
2017-10-20base: Defining make_unique for C++11Giacomo Travaglini
2017-10-19cpu-o3: Add M5_VAR_USED to variableJason Lowe-Power
2017-10-19scons: Fix the regression tests.Gabe Black
2017-10-17scons: Stop generating inc.d in the isa parser.Gabe Black
2017-10-17arch-arm: Fix inverted 32/64-bit check in GDBBoris Shingarov
2017-10-17util: Filter out the For-Upstream commit message tagAndreas Sandberg
2017-10-13arch-arm: Signal an event when executing store exclusivesNikos Nikoleris
2017-10-13mem: Signal the local monitor when clearing the global monitorNikos Nikoleris
2017-10-13cpu-o3: Check predication before the SQ size for a debug printNikos Nikoleris
2017-10-13cpu-o3: Avoid early checker verification for store conditionalsNikos Nikoleris
2017-10-05tests: Fix path for module imports in ARM system configs againCurtis Dunham
2017-10-05misc: Add util/packet_pb2.py to .gitignore.Gabe Black
2017-10-05misc: Use a Makefile to ensure util/packet_pb2.py is up to date.Gabe Black
2017-10-05misc: When building packet_pb2.py, don't assume a particular CWD.Gabe Black
2017-10-05misc: Make decode_packet_trace.py print the new master ID fields.Gabe Black
2017-10-05misc: Small style fix in _EncodeVarint32.Gabe Black
2017-10-05misc: Rename the (De|En)codeVarint function _(De|En)codeVarint32.Gabe Black
2017-10-05misc: Fix the indentation in DecodeVarint in util/protolib.py.Gabe Black
2017-10-04tlm: Elastic Trace Example with L2 Cache AddedMatthias Jung
2017-09-28sim-se: Fix mremap for downward growing mmap regionsRico Amslinger
2017-09-27arch-x86: fix CondInst decoding for MOV to Control RegistersBjoern A. Zeeb
2017-09-27arch: change panic for Vector traceData to warn_onceBjoern A. Zeeb
2017-09-27sim: make compile on FreeBSD prior to 11Bjoern A. Zeeb
2017-09-26util: Make dot_writer ignore NULL simobjects.Gabe Black
2017-09-26dev: Make the IDE controller handle NULL simobject pointers.Gabe Black
2017-09-26sim: Add a get_config_as_dict to the NullSimObject class.Gabe Black
2017-09-26sim: Don't add the NULL SimObject as a child of other SimObjects.Gabe Black
2017-09-26misc: Make the m5 utilities writefile command accept a host path.Gabe Black
2017-09-26sim: Give the NullSimObject singleton a _name.Gabe Black
2017-09-26sim: Add a NullSimObject.descendants function.Gabe Black
2017-09-26sim: Add a clear_parent function to NullSimObject.Gabe Black
2017-09-26sim: Check the SimObjectVector.has_parent function to use the "any" function.Gabe Black
2017-09-26sim: Only consider non-NULL elements in SimObjectVector.has_parent.Gabe Black
2017-09-26sim: Add a set_parent to NullSimObject which does nothing.Gabe Black
2017-09-25mem: Fill the new packet ID fields with master IDs when tracing packets.Gabe Black
2017-09-25mem: Add a "map" of packet IDs to strings in probe traces.Gabe Black
2017-09-25mem: Trace the request master ID in the MemTraceProbe.Gabe Black
2017-09-25mem: Record the request master ID in the PacketInfo structure.Gabe Black
2017-09-25dev, virtio: Improvements to diod process handlingAnouk Van Laer
2017-09-21alpha: Move some initialization logic from loadState into unserialize.Gabe Black
2017-09-21sim: Stop using loadState in the Root SimObject.Gabe Black
2017-09-20kvm: arm: Get rid of functions which just wrap the subclasses version.Gabe Black