gem5 - gem5

Age	Commit message (Expand)	Author
2015-03-19	cpu: Fix TrafficGen message format	Wendy Elsasser
2015-03-19	mem: Use emplace front/back for deferred packets	Andreas Hansson
2015-03-19	mem: Enable CommMonitor to output traces in atomic mode	Geoffrey Blake
2015-03-19	config: Fix DRAM rank option in sweep script	Andreas Hansson
2015-03-19	tests: Bump timeout to 5 hours	Andreas Hansson
2015-02-11	mem: remove redundant test in in Cache::recvTimingResp()	Steve Reinhardt
2015-02-11	mem: add local var in Cache::recvTimingResp()	Steve Reinhardt
2015-02-11	mem: restructure Packet cmd initialization a bit more	Steve Reinhardt
2015-03-14	mem: clean up write buffer check in Cache::handleSnoop()	Steve Reinhardt
2015-03-09	tests: remove not maintained 20.eio-short detailed test	Nilay Vaish
2015-03-09	stats: changes to due to recent set of patches	Nilay Vaish
2015-03-09	config: Fix for 'android' lookup in disk name	Rizwana Begum
2015-03-09	cpu: o3: another assert instead of check	Nilay Vaish
2015-03-09	cpu: o3: Remove unused code in iew, add assert instead.	Nilay Vaish
2015-03-09	cpu: o3: commit: mark pipeline delay variable as consts	Nilay Vaish
2015-03-09	cpu: o3: remove unused stat variables.	Nilay Vaish
2015-03-09	cpu: o3: combine if with same condition	Nilay Vaish
2015-03-09	cpu: o3: remove member variable squashCounter	Nilay Vaish
2015-03-09	cpu: o3: remove unused function annotateMemoryUnits()	Nilay Vaish
2015-03-07	stats: update eio stats	Steve Reinhardt
2015-03-02	stats: Update stats to reflect cache and interconnect changes	Andreas Hansson
2015-03-02	mem: Unify all cache DPRINTF address formatting	Andreas Hansson
2015-03-02	mem: Fix cache MSHR conflict determination	Andreas Hansson
2015-03-02	mem: Add byte mask to Packet::checkFunctional	Andreas Hansson
2015-03-02	mem: Add option to force in-order insertion in PacketQueue	Stephan Diestelhorst
2015-03-02	mem: Downstream components consumes new crossbar delays	Marco Balboni
2015-03-02	mem: Move crossbar default latencies to subclasses	Andreas Hansson
2015-03-02	mem: Add crossbar latencies	Marco Balboni
2015-03-02	dev, arm: Clean up PL011 and rewrite interrupt handling	Andreas Sandberg
2015-03-02	arm: Share a port for the two table walker objects	Andreas Hansson
2015-03-02	arm: Remove unnecessary dependencies between AArch64 FP instructions	Giacomo Gabrielli
2015-03-02	cpu: o3 register renaming request handling improved	Rekai
2015-03-02	mem: Tidy up the cache debug messages	Andreas Hansson
2015-03-02	mem: Split port retry for all different packet classes	Andreas Hansson
2015-03-02	mem: Fix prefetchSquash + memInhibitAsserted bug	Ali Jafri
2015-03-02	cpu: Add a PC-value to the traffic generator requests	Stephan Diestelhorst
2015-03-02	tests: Run regression timeout as foreground	Andreas Hansson
2015-03-02	arm: Don't truncate 16-bit ASIDs to 8 bits	Andreas Sandberg
2015-03-02	arm: Correctly access the stack pointer in GDB	Andreas Sandberg
2015-03-02	arm: Fix broken page table permissions checks in remote GDB	Andreas Sandberg
2015-02-26	Ruby: Update backing store option to propagate through to all RubyPorts	Jason Power
2015-02-16	config: Add memcheck stress test	Andreas Hansson
2015-02-16	cpu: TrafficGen sinks snoops without complaining	Andreas Hansson
2015-02-16	mem: Fix initial value problem with MemChecker	Stephan Diestelhorst
2015-02-16	dev: Fix undefined behaviuor in i8254xGBe	Andreas Hansson
2015-02-16	arm: Wire up the GIC with the platform in the base class	Andreas Sandberg
2015-02-16	mem: mmap the backing store with MAP_NORESERVE	Andreas Hansson
2015-02-16	mem: Use the range cache for lookup as well as access	Andreas Hansson
2015-02-16	arch: Make readMiscRegNoEffect const throughout	Andreas Hansson
2015-01-16	config: add --root-device machine parameter	Curtis Dunham