Age | Commit message (Collapse) | Author |
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extra : convert_revision : 4f393a5471656b29cecbacfcb337992239775915
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renamed part and a control part for the different bitfields, but the renamed part is all that's actually used.
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extra : convert_revision : ffeb4f874bd4430255064f6e8bcb135309932ff8
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into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec
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extra : convert_revision : 26118d0dce464405148d2693fee4561fa0ce10ff
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since things have moved around a bit
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encumbered directory
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they're used
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into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec
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extra : convert_revision : d18cce378fe3390c6e708945b9ea7c76c2d20a81
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into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head
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tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.out:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/stderr:
tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini:
tests/long/30.eon/ref/alpha/tru64/o3-timing/config.out:
tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/30.eon/ref/alpha/tru64/o3-timing/stderr:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.out:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.out:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stderr:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.out:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.out:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/stderr:
Update refs.
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extra : convert_revision : 19483a5a18e76338a3208a58d7460a922377acd3
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checked for control flow because we can pull out microops until we run out of buffer. This prevents microops from being interpretted as branches because the pc doesn't become npc.
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extra : convert_revision : 9fff7c6c32900692bbc567ecb75701c9c73da259
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extra : convert_revision : 26ea87bfe9e5c27134eb9a15bf9e4629afae6c69
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handling. Branch delay slots need to be squash on a mispredict as well because the nnpc they saw was incorrect.
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extra : convert_revision : 8b9c603616bcad254417a7a3fa3edfb4c8728719
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Oops!
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this as well.
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into udhcp-macvpn-501.public.engin.umich.edu:/Users/ali/work/m5.newmem
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extra : convert_revision : 38c2427790d27c64e69ac3223e76cabeeb765904
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AUTHORS:
add sparc full system support to my list of accolades
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extra : convert_revision : 1d3afaae2502306e44cd7fb251e763931a7e3ae9
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handling. Performance actually went up slightly.
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extra : convert_revision : 504f6185ddc89881aa41deb7fd934da8038d1ed2
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squashed anyway on a mispredict. This is because the NNPC value they saw when executing was incorrect.
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extra : convert_revision : b42c4eb28b4fbba66c65cbd0a5033bf886c1532d
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and python code into m5 to allow swig an python code to
easily added by any SConscript instead of just the one in
src/python. This provides SwigSource and PySource for
adding new files to m5 (similar to Source for C++). Also
provides SimObject for including files that contain SimObject
information and build the m5.objects __init__.py file.
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extra : convert_revision : 38b50a0629846ef451ed02f96fe3633947df23eb
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or automatically do Split(). It isn't used anywhere, and
isn't very consistent with the python features that are
about to be added. Do accept SCons.Node.FS.File arguments
though.
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extra : convert_revision : 0f3bb0e9e6806490330eea59a104013042b4dd49
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unproxy() needs to return a new object otherwise all
instances will use the same value. This fix is more
or less unique to NextEthernetAddr because its use of
the proxy stuff is a bit different than everything else.
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extra : convert_revision : 2ce452e37d00b9ba76b6abfaec0ad2e0073920d7
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to be created
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extra : convert_revision : 826cc692614528f987c80c3410cb025190f0a4e0
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec
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implementations from using doubles to using concatenated singles.
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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test the stub code for instructions.
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extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
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in the AMD64 manuals' instruction summary in volume 1.
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parser as a unit.
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extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
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unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't.
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extra : convert_revision : 24e69c5a6a0af2d0cf67e858a051ae6624bb300f
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec
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extra : convert_revision : 70221349a7100c89be0d03210f3b04950370583f
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and it's configuration is a hack
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extra : convert_revision : a582684f3a2dd1d1d0d8b93a9e213d9108491535
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into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head
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extra : convert_revision : a250eed999be9b8acd6f420fdfe8f1b02905beb1
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extra : convert_revision : a1a218d3294515184689041487057495223360b7
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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--HG--
extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
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size than the architected one. Also fixed some asserts.
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extra : convert_revision : 26e7863919d1b976ba8cad747af475a6f18e9440
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec
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extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
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IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly.
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extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
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and added some comments to main.isa
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