Age | Commit message (Expand) | Author |
2015-05-26 | arm: Make address translation faster with better caching | Nathanael Premillieu |
2015-05-26 | base: Allow multiple interleaved ranges | Andreas Hansson |
2015-05-26 | stats: Update MinorCPU regressions after accounting fix | Andreas Hansson |
2015-05-26 | cpu: Fix a bug in counting issued instructions in MinorCPU | Andrew Bardsley |
2015-05-26 | arm: Implement some missing syscalls (SE mode) | Giacomo Gabrielli |
2015-05-26 | ruby: Deprecation warning for RubyMemoryControl | Andreas Hansson |
2015-05-23 | arm, stats: Update stats to reflect changes to generic timer | Andreas Sandberg |
2015-05-23 | arm, dev: Add support for a memory mapped generic timer | Andreas Sandberg |
2015-05-23 | arm: Get rid of pointless have_generic_timer param | Andreas Sandberg |
2015-05-23 | dev, arm: Add virtual timers to the generic timer model | Andreas Sandberg |
2015-05-23 | dev, arm: Refactor and clean up the generic timer model | Andreas Sandberg |
2015-05-23 | kvm: Fix dumping code for large registers | Andreas Sandberg |
2015-05-23 | kvm, x86: Guard x86-specific APIs in KvmVM | Andreas Sandberg |
2015-05-23 | build: Don't test for KVM xsave support on ARM | Andreas Sandberg |
2015-05-23 | arm: Workaround incorrect HDLCD register order in kernel | Andreas Sandberg |
2015-05-23 | base: Redesign internal frame buffer handling | Andreas Sandberg |
2015-05-23 | base: Clean up bitmap generation code | Andreas Sandberg |
2015-05-19 | ruby: Fix RubySystem warm-up and cool-down scope | Joel Hestness |
2015-05-15 | arm: Identify table-walker requests | Andreas Hansson |
2015-05-15 | misc: Appease gcc 5.1 | Andreas Hansson |
2015-05-15 | sim: Don't clear the active CPU vector in System::initState | Andreas Sandberg |
2015-05-15 | config: Use null memory for DRAM sweep script | Andreas Hansson |
2015-05-15 | config: Add new MemConfig options to DRAM sweep script | Wendy Elsasser |
2015-05-05 | syscall_emul: fix warn_once behavior | Steve Reinhardt |
2015-05-05 | stats, arm: Update stats for missing FPEXC.EN check | Andreas Hansson |
2015-05-05 | arm: Add missing FPEXC.EN check | Andreas Hansson |
2015-05-05 | arm: enable DCZVA by default in SE mode | Giacomo Gabrielli |
2015-05-05 | stats: Update stats to reflect cache changes | Andreas Hansson |
2015-03-17 | mem: Create a request copy for deferred snoops | Stephan Diestelhorst |
2015-05-05 | arm: Relax ordering for some uncacheable accesses | Andreas Sandberg |
2015-05-05 | mem, cpu: Add a separate flag for strictly ordered memory | Andreas Sandberg |
2015-05-05 | mem, alpha: Move Alpha-specific request flags | Andreas Sandberg |
2015-05-05 | arm: Remove unnecessary boot uncachability | Andreas Hansson |
2015-05-05 | mem: Snoop into caches on uncacheable accesses | Andreas Hansson |
2015-05-05 | arch, cpu: Do not forward snoops to table walker | Andreas Hansson |
2015-05-05 | mem: Pass shared downstream through caches | Andreas Hansson |
2015-05-05 | mem: Add forward snoop check for HardPFReqs | Ali Jafri |
2015-05-05 | mem: Add missing stats update for uncacheable MSHRs | Andreas Hansson |
2015-05-05 | mem: Tidy up BaseCache parameters | Andreas Hansson |
2015-05-05 | mem: Remove templates in cache model | David Guillen |
2015-05-05 | cpu: Work around gcc 4.9 issues with Num_OpClasses | Andreas Hansson |
2015-05-05 | stats: Bring regression stats in line with actual behaviour | Andreas Hansson |
2015-04-30 | stats: arm: updates | Nilay Vaish |
2015-04-29 | stats: x86: updates due to change in div latency | Nilay Vaish |
2015-04-29 | arch, base, dev, kern, sym: FreeBSD support | Ruslan Bukin |
2015-04-29 | mem: Simplify page close checks for adaptive policies | Rizwana Begum |
2015-04-29 | ruby: set: replace long by unsigned long | Nilay Vaish |
2015-04-29 | cpu: o3: replace issueLatency with bool pipelined | Nilay Vaish |
2015-04-29 | cpu: o3: single cycle default div microop latency on x86 | Nilay Vaish |
2015-04-29 | x86: change divide-by-zero fault to divide-error | Nilay Vaish |