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AgeCommit message (Expand)Author
2013-10-31base: Add support for ipv6 into inet.hh/inet.ccGeoffrey Blake
2013-10-31cpu: Construct ROB with cpu params struct instead of each variableFaissal Sleiman
2013-10-31config: Fix handling of parents for simobject vectorsGeoffrey Blake
2013-10-31sim: added option to serialize SimLoopExitEventDam Sunwoo
2013-10-31mem: Add "const" attribute to Packet gettersStephan Diestelhorst
2013-10-31mem: Add privilege info to request classPrakash Ramrakhyani
2013-10-31arm: fix m5ops binary for ARM and add m5fail.Ali Saidi
2013-10-31cpu: Fix O3 issuse with load+barrier instructions.Ali Saidi
2013-10-30ruby: set SenderMachine in messages of MOESI_CMP_directoryLluc Alvarez
2013-10-30ruby: Fixed a deadlock when restoring a checkpoint with garnetEmilio Castillo
2013-10-17mem: De-virtualise interfaces in the CoherentBusStephan Diestelhorst
2013-10-17cpu: add consistent guarding to *_impl.hh files.Matt Horsnell
2013-10-17mem: Add PortID to QueuedMasterPort constructorSascha Bischoff
2013-10-17arm: Add a 'clear PPI' method to gic_pl390Matt Evans
2013-10-17config: Fix ommission of number base in ethernet address paramGeoffrey Blake
2013-10-17config: Fix for port references generated multiple timesGeoffrey Blake
2013-10-17dev: Add option to disable framebuffer .bmp dump in run folderDam Sunwoo
2013-10-17cpu: Removing an unused variable in renameFaissal Sleiman
2013-10-17cpu: Change IEW DPRINTF to use IEW debug flagFaissal Sleiman
2013-10-17cpu: Put in assertions to check for maximum supported LQ/SQ sizeFaissal Sleiman
2013-10-17util: Streamline .apc project convertsion scriptDam Sunwoo
2013-10-17arm: Accomodate function name changes in newer linux kernelsEric Van Hensbergen
2013-10-17arm: Fix a GIC mask register bugAli Saidi
2013-10-17cpu: Fix O3 uncacheable load that is replayed but misses the TLBAli Saidi
2013-10-17mem: Make MemoryAccess flag more verboseAli Saidi
2013-10-17build: Place proto output in the same directory, also for EXTRASAndreas Hansson
2013-10-17arm, config: Fix a small issue with the dtb file being specifiedAli Saidi
2013-10-17config: Fix memtest example scriptAli Saidi
2013-10-17dev: Allow additional UART interrupts to be setAli Saidi
2013-10-17build: Enable color diagnostics in clang by preserving TERM.Stan Czerniawski
2013-10-16kvm: Fix latency calculation of IPR accessesAndreas Sandberg
2013-10-16test: update statsSteve Reinhardt
2013-10-15ruby: eliminate non-determinism from ruby.stats outputSteve Reinhardt
2013-10-15scons: fix minor update-ref bug in regressionsSteve Reinhardt
2013-10-15arch/x86: add support for explicit CC register fileYasuko Eckert
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-10-15cpu/o3: clean up rename map and free listSteve Reinhardt
2013-10-15cpu: rename *_DepTag constants to *_Reg_BaseSteve Reinhardt
2013-10-15isa: clean up register constantsSteve Reinhardt
2013-10-15cpu/o3: clean up scoreboard objectSteve Reinhardt
2013-10-15cpu/o3: clean up physical register fileSteve Reinhardt
2013-10-15cpu/inorder: merge register class enumsSteve Reinhardt
2013-10-15cpu: clean up architectural register classificationSteve Reinhardt
2013-10-15mem: Rename the ASI_BITS flag field in RequestAndreas Sandberg
2013-10-15mem: Use a flag instead of address bit 63 for generic IPRsAndreas Sandberg
2013-10-14Added tag stable_2013_10_14 to the changeset 6a043adb1e8dNilay Vaish
2013-10-09config: correct example ruby scriptsNilay Vaish
2013-10-09stats: Bump pc-simple-timing-ruby statsAndreas Hansson
2013-10-07config: set cwd for processes in se.pyNilay Vaish
2013-10-07x86: enables lstat and readlink syscallsNilay Vaish