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AgeCommit message (Expand)Author
2014-09-01build opts: add MI_example to NULL ISANilay Vaish
2014-09-01mem: change the namespace Message to ProtoMessageNilay Vaish
2014-09-01ruby: slicc: change the way configurable members are specifiedNilay Vaish
2014-09-01ruby: slicc: improve the grammarNilay Vaish
2014-09-01ruby: mesi three level: slight naming changes.Nilay Vaish
2014-09-01ruby: slicc: donot prefix machine name to variablesNilay Vaish
2014-09-01ruby: remove unused toString() from AbstractControllerNilay Vaish
2014-09-01ruby: network: move getNumNodes() to base classNilay Vaish
2014-09-01ruby: eliminate type TimeNilay Vaish
2014-09-01ruby: move files from ruby/system to ruby/structuresNilay Vaish
2014-09-01ruby: Fixes clock domains in configuration filesEmilio Castillo ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2014-08-28mem: adding architectural page table support for SE modeAlexandru
2014-04-01mem: adding a multi-level page table classAlexandru
2014-08-26Added tag stable_2014_08_26 for changeset cb2e6950956dNilay Vaish
2014-08-26mem: Fix DRAMSim2 cycle check when restoring from checkpointAndreas Hansson
2014-08-26base: Add const to intmath and be more flexible with typingAndreas Hansson
2014-08-26style: Add support for a style ignore list and ignore ext/Andreas Sandberg
2014-08-26style: Fixup strange semantics in hg m5styleAndreas Sandberg
2014-08-26base: Replace the internal varargs stuff with C++11 constructsAndreas Sandberg
2014-08-26base: Add compiler macros for C++11 final/overrideAndreas Sandberg
2014-08-26mips: Fix RLIMIT_RSS namingMitch Hayenga
2014-08-26base: Add a static assert to check bit union rangesAndreas Sandberg
2014-08-26sparc: Fixup bit ordering in the PSTATE bit unionAndreas Sandberg
2014-08-26mem: Update DRAM controller commentsAndreas Hansson
2014-08-26mem: Fix address interleaving bug in DRAM controllerAndreas Hansson
2014-02-05sim: bump checkpoint version for multiple event queuesCurtis Dunham
2014-08-26misc: README direct to website for dependenciesAndreas Hansson
2014-08-13arm: change MISCREG_L2ERRSR to warn not failDam Sunwoo
2014-08-13sim: remove kernel mapping check for baremetal workloadsDam Sunwoo
2014-08-13scons: Build the branch predictor for all CPUsAndreas Sandberg
2014-08-13mips: Remove unused private members to fix compile-time warningAndreas Sandberg
2014-08-13power: Remove unused private members to fix compile-time warningAndreas Sandberg
2014-08-13scons: Silence clang 3.4 warnings on Ubuntu 12.04Andreas Sandberg
2014-08-13base: Remove unused M5_PRAGMA_NORETURNAndreas Sandberg
2014-08-13cpu: Don't forward declare RefCountingPtrAndreas Sandberg
2014-08-13util: Fix state leakage in the SortIncludes style verifierAndreas Sandberg
2014-08-13mem: Properly set cache block status fields on writebacksMitch Hayenga
2014-08-13cpu: Modernise the branch predictor (STL and C++11)Andreas Hansson
2014-03-11arm: remove dead code fplib mul64x64Curtis Dunham
2014-08-13ext: clang fix for flexible array membersMitch Hayenga
2014-08-10config: Fix cache latency param in mem testRadhika Jagtap
2014-08-10util: Move packet trace file read to protolibRadhika Jagtap
2014-08-10config: Add SubSystem container for simobjectsGeoffrey Blake
2014-08-10config: Add hooks to enable new config sysGeoffrey Blake
2014-08-10cpu: Ensure the traffic generator suppresses non-memory packetsAndreas Hansson
2014-08-10base: Remove unused filesAndreas Hansson
2014-08-10scons: Warn for incompatible gcc and binutilsAndreas Hansson
2014-07-28mem: refactor LRU cache tags and add random replacement tagsAnthony Gutierrez
2014-07-28arm: make the PseudoLRU tags the default for the O3_ARM_v7aL2Anthony Gutierrez
2014-07-28stats: Bump stats for the regressions using the minor CPUAndreas Hansson