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2005-08-19A few minor fixes to get things to build on Cygwin.Steve Reinhardt
README: Clarify cygwin EIO error explanation. build/SConstruct: Cygwin header files cause uninitialized var warnings. dev/ide_ctrl.cc: Get rid of unnecessary byte-swap calls, some of which were too ambiguous for cygwin (or gcc 3.4.4). dev/pcidev.cc: Disambiguate arg for overloaded byte swap operation (and fix it to be the correct one). --HG-- extra : convert_revision : be37c6315aacbec6332b1d09e726b39b4aa18dce
2005-08-19Minor tweaks for 1.1 release.Steve Reinhardt
README: Updated for release 1.1. Clarified several minor things (I hope). --HG-- extra : convert_revision : a088f670739d33765611ce413b96854a1b51bb0f
2005-08-18Fix another bug from the freebsd mergeNathan Binkert
--HG-- extra : convert_revision : b153b0c12b6678df148839617954a9a4c6fec7d4
2005-08-18Fix a couple of turbolaser problems that were introduced by theNathan Binkert
new freebsd code. dev/ns_gige.cc: g++ doesn't like it when you declare a variable inside a case label. Pull the declaration outside. --HG-- extra : convert_revision : d39e84fc58f2dd5b09c5948eedb4b1d7848e9817
2005-08-16Clean up freebsd_system.cc.Benjamin Nash
kern/freebsd/freebsd_system.cc: Use htog instead of htoa. --HG-- extra : convert_revision : 09224d60ce5bb3827c9f046127ff6fc72fa008d6
2005-08-16Merge zed.eecs.umich.edu:/.automount/fox/y/mserrano/m5_dir/m5Benjamin Nash
into zed.eecs.umich.edu:/z/benash/bk/m5 --HG-- extra : convert_revision : 9b7ca872187a13179118ad0651301d531332dc63
2005-08-16Uart fix.Miguel Serrano
dev/uart8250.cc: Fixed implementation of "transmit interrupt clear". --HG-- extra : convert_revision : cb69d61413ea799d5d3825fe2f0891dd72995561
2005-08-16Merge m5.eecs.umich.edu:/bk/m5Benjamin Nash
into zed.eecs.umich.edu:/z/benash/bk/m5 --HG-- extra : convert_revision : 36bb126381caf84d85a566579225b02c15f8f356
2005-08-16Updates to job scripts to accept more than 15 characters of jobnameNathan Binkert
Make the Link directory even more useful by working with sub-directories. util/pbs/job.py: Expose JOBNAME as a separate parameter from PBS_JOBNAME. If the former exists, it is used as the jobname for starting the job, if it doesn't exist, PBS_JOBNAME is used. This is to get around the 15 character maximum pbs job name length. While we're at it, shuffle things around to hopefully make things a bit more clear. util/pbs/send.py: Make the Link directory functionality more sophisticated, copy sub-directories and links to directories. (we still don't copy dotfiles though) Add the setname() function to contact pbs and use raj's hack to tell the webpage about longer jobnames. (it's gross, don't look) truncate the pbs job name to 15 characters so that it works. --HG-- extra : convert_revision : 4a76b1a1c33721c7ca93e2fbb761f95bc3a2ac69
2005-08-15Merge zed.eecs.umich.edu:/.automount/fox/y/mserrano/m5_dir/m5Benjamin Nash
into zed.eecs.umich.edu:/z/benash/bk/m5 dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/ide_disk.cc: dev/ide_disk.hh: dev/ns_gige.cc: dev/pciconfigall.cc: dev/pcidev.cc: dev/rtcreg.h: dev/tsunami_io.cc: dev/tsunami_io.hh: dev/uart8250.cc: dev/uart8250.hh: python/m5/objects/Tsunami.py: Merge code. --HG-- extra : convert_revision : e97d5dbcc051d2061622201265430d359f995d48
2005-08-15Changes for getting FreeBSD to run.Miguel Serrano
SConscript: Added more files to compile: dev/pcifake.cc, dev/isa_fake.cc, kern/freebsd/freebsd_system.cc, kern/freebsd/freebsd_events.cc. arch/alpha/isa_traits.hh: Added constant for argument register 2 as it is needed by FreebsdSystem::doCalibrateClocks(). cpu/exec_context.hh: cpu/o3/alpha_cpu.hh: Replaced htoa()s with gtoh() and htog(). cpu/o3/fetch_impl.hh: cpu/simple/cpu.cc: Replaced htoa() with gtoh(). dev/disk_image.cc: Replaced htoa()s with letoh()s. dev/ide_ctrl.cc: Got rid of magic numbers. Added IdeChannel and IdeRegType type names where necessary. dev/ide_ctrl.hh: Got rid of unnecessary macros. Changed RegType_t to IdeRegType. Changed bmi_regs to allow accessing registers by name instead of just by array index. Added IdeChannel enum type to use in place of bool variables which were used to specify IDE channel. dev/ide_disk.cc: Rewrote IdeDisk::read and IdeDisk::write functions to specify registers by name instead of indexing through an array. dev/ide_disk.hh: Updated command register struct. dev/ns_gige.cc: dev/ns_gige.hh: Made ReadConfig and WriteConfig begin with a lower-case letter. writeConfig() now takes a pointer to data as a parameter instead of a copy of data. dev/pciconfigall.cc: writeConfig() now takes a pointer to data as a parameter instead of a copy of data. dev/pcidev.cc: Cleaned up readConfig() and writeConfig() functions. dev/pcidev.hh: Added macros to make code that works with the BARs (base adress registers) more readable. writeConfig() now takes a pointer to data. dev/pcireg.h: Changed PCIConfig struct to make accessing elements more straight forward. Removed type 1 (for PCI-to-PCI bridges) PCI configuration space struct since it is not used. dev/rtcreg.h: Added macros for bit fields in RTC status registers A & B. dev/sinic.cc: Function name change: WriteConfig --> writeConfig. writeConfig() now takes a pointer to data instead of a copy of data. The accessing of elements of PCIConfig structure is updated. dev/sinic.hh: Function name change: WriteConfig --> writeConfig. writeConfig() now takes a pointer to data instead of a copy of data. dev/tsunami_io.cc: Added implementation of new RTC and PIT classes. dev/tsunami_io.hh: Added classes for RTC and PIT modules. dev/tsunamireg.h: Added macros for DMA ports used by Tsunami-Tru64. dev/uart8250.cc: Got rid of a magic number. Transmit (Tx) interrupts should clear upon a read of the Interrupt ID register. dev/uart8250.hh: Added comments and macros dealing with the UART Interrupt ID register. kern/linux/linux_system.cc: Replaced htoa() with htog(). python/m5/objects/Pci.py: PciFake is a python class for Pci Devices that do nothing. python/m5/objects/Tsunami.py: TsunamiFake was renamed as IsaFake. sim/system.cc: Replaced htoa()s with htog()s. dev/isa_fake.cc: New BitKeeper file ``dev/isa_fake.cc'' TsunamiFake was renamed as IsaFake. dev/isa_fake.hh: New BitKeeper file ``dev/isa_fake.hh'' TsunmaiFake was renamed as IsaFake. dev/pitreg.h: New BitKeeper file ``dev/pitreg.h'' Useful macros for working with PIT (Periodic Interval Timer) registers. --HG-- extra : convert_revision : 33f3a8a1034af4f6c71b32dd743e371c8613e780
2005-08-15Fix NextEthernetAddrNathan Binkert
python/m5/config.py: NextEthernetAddr shouldnt' be a Singleton since we want __init__ to be called more than once. Make the EthernetAddr class a "proxy" so that unproxy will be called and NextEthernetAddr will generally work correctly. --HG-- extra : convert_revision : c89bf268e805e202ae71030fcea4833867c7e477
2005-08-12Improve FreeBSD networking support.Benjamin Nash
dev/ns_gige.cc: Added FreeBSD support. Required additional register read/write functionality, hash filtering (faked), and EEPROM read access. dev/ns_gige.hh: Added constants and variables for FreeBSD support. Also created eepromKick() to advance state machine. dev/ns_gige_reg.h: Defined additional register bit fields. dev/pcidev.cc: Fix &= typo. dev/sinic.cc: Remove an INIT_PARAM_DFLT macro. dev/tsunami_io.cc: Fix DPRINTF typo. kern/freebsd/freebsd_system.cc: Edit comments. --HG-- extra : convert_revision : 37aaa1303d57d3784381e85acb3bc1743adeb8c0
2005-07-28Merge zed.eecs.umich.edu:/.automount/fox/y/mserrano/m5_new/m5Benjamin Nash
into zed.eecs.umich.edu:/z/benash/bk/m5 SConscript: dev/ide_disk.hh: Formatting. dev/ide_ctrl.cc: Endianness dev/ide_disk.cc: dev/pcidev.cc: dev/tsunami_io.cc: dev/uart8250.cc: Clean up code. --HG-- extra : convert_revision : cb554f0e3a701371d2106cd7e11a4a22f773acc2
2005-07-28.Miguel Serrano
SConscript: add pcifake dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/ide_disk.cc: dev/ide_disk.hh: endianess dev/tsunami_io.cc: rtc, date/time --HG-- extra : convert_revision : 21ad27c780749cb6f6eef2b57798c0c292c3f14d
2005-07-28ghgfsdfMiguel Serrano
dev/pciconfigall.cc: removed union. dev/pcidev.cc: . dev/rtcreg.h: more macros to avoid magic numbers. dev/tsunami_io.cc: replaced magic numbers, no more advancing RTC as it isn't reaaly necessary. dev/tsunami_io.hh: removed declarations of things that go unused. dev/uart8250.cc: reading the Interrupt ID register should clear TX interrupt flag. dev/uart8250.hh: useful #defines. kern/freebsd/freebsd_system.cc: kern/freebsd/freebsd_system.hh: nothing. python/m5/objects/Pci.py: new PciFake. --HG-- extra : convert_revision : 88259704f5b215591d1416360180810fcda14d26
2005-07-26Merge m5read@m5.eecs.umich.edu:/bk/m5Benjamin Nash
into zed.eecs.umich.edu:/z/benash/bk/m5 --HG-- extra : convert_revision : 5cfec85dbfc33b942929e6d379275618f2c60c33
2005-07-26Various changes to I/O, addition of PciFake device to improve FreeBSD ↵Benjamin Nash
compatibility. SConscript: Include pcifake.cc, fix spacing. dev/ide_ctrl.cc: Consolidate switch-case blocks. dev/ide_disk.cc: Add comments. dev/pciconfigall.cc: Adjust spacing. dev/pcidev.cc: Adjust spacing, rearrange code. dev/tsunami_io.cc: Rearrange code. dev/uart8250.cc: Switch uart interrupt interval back to original value. python/m5/objects/Pci.py: Add PciFake class to be used as a PCI-ISA bridge device. --HG-- extra : convert_revision : 8aea94318510079a310377f297aa161ba5f7864c
2005-07-18Fix for passing functional memory param to timing mem.Steve Reinhardt
python/m5/config.py: Fix error message. --HG-- extra : convert_revision : 4e57f7bdd4ea7dfdd3e88c60080f993997b0bda2
2005-07-14Fix for bug in using compression in full-system mode.Steve Reinhardt
Involves adding functional memory param (for full-system mode only, for now). --HG-- extra : convert_revision : f42cf087969427b5406be0162e13163d3624684f
2005-07-13Various changes to m5/dev files to work with FreeBSD.Benjamin Nash
dev/ide_ctrl.cc: dev/ide_disk.cc: dev/pcidev.cc: Made endian-independent. dev/ide_disk.hh: fixed. dev/pciconfigall.cc: The data to write is contained in a 32-bit unsigned int now. The union method would not have worked on big-endian machines. dev/pcidev.hh: Fixed typo. dev/tsunami_io.cc: Return zero on RTC alarm reads. dev/uart8250.cc: Fix uart interrupt handling. --HG-- extra : convert_revision : b5c08e8e77644c399c20888666406805ff1b6649
2005-07-06no license in treeNathan Binkert
--HG-- extra : convert_revision : 4a9bb7be1e7e3f465ad34b9129b7c1e0578dbfcc
2005-07-05config:Steve Reinhardt
Add license. --HG-- extra : convert_revision : af110213e79464b8f2d970a2e906d1234e818c6d
2005-07-01Hand merge ide_disk.ccBenjamin Nash
dev/ide_disk.cc: Don't initialize data to 0. --HG-- extra : convert_revision : 643bcf15b52c3e14231d8136b8cb049a8896457a
2005-07-01Merge m5read@m5.eecs.umich.edu:/bk/m5Miguel Serrano
into zamp.eecs.umich.edu:/.automount/fox/y/mserrano/m5_new/m5 --HG-- extra : convert_revision : bb3e977e79599c459fb32f309ce5b486f1639afa
2005-07-01.Miguel Serrano
--HG-- extra : convert_revision : 1ed206b27498641b64d7f35c74ea1f0623398d4e
2005-07-01Merge m5read@m5.eecs.umich.edu:/bk/m5Benjamin Nash
into zed.eecs.umich.edu:/z/benash/bk/m5 --HG-- extra : convert_revision : b421397b21326ec2bdd3ce82b9f69e224b380610
2005-07-01Fix formatting, move default size (0x8) of TsunamiFake from C++ code to ↵Benjamin Nash
Python code. dev/ide_disk.cc: Fix formatting. Panic if unexpected register type is given. python/m5/objects/Tsunami.py: Add default size of TsunamiFake device. --HG-- extra : convert_revision : 03a35a2f6468b95746cba41ce7e93afeeb70ccef
2005-06-30Initialize bpred table pointers.Steve Reinhardt
--HG-- extra : convert_revision : 9999c05b7fb8f66c2b9d5544868994f82d432d19
2005-06-30Remove #include statments in various files within kern/Benjamin Nash
kern/freebsd/freebsd_system.cc: kern/freebsd/freebsd_system.hh: kern/kernel_stats.cc: kern/kernel_stats.hh: kern/linux/aligned.hh: kern/linux/linux_system.cc: kern/linux/linux_system.hh: kern/linux/linux_threadinfo.hh: kern/linux/printk.cc: kern/linux/sched.hh: kern/linux/thread_info.hh: kern/system_events.cc: kern/system_events.hh: Remove unecessary #include statements. --HG-- extra : convert_revision : 7e32d3b096fc92708ea45db9b172bada906024cd
2005-06-30Formatting, reduce maximum number of functional memory children.Benjamin Nash
dev/ide_disk.cc: dev/pcidev.cc: Formatting. --HG-- extra : convert_revision : 6f5824aa220fe311751fb10ec8648fe64dfa4775
2005-06-30Fixes for cygwin compile.Steve Reinhardt
dev/ide_atareg.h: Need endian.h for LITTLE_ENDIAN. sim/syscall_emul.hh: Need to include sys/fcntl.h to get O_BINARY. --HG-- extra : convert_revision : 606f9506dc483f3952dcc65b8ba25c28001f2c43
2005-06-29Easier remote debugging at boot time.Nathan Binkert
sim/system.cc: Add a global variable that will tell the remote debugger to wait when a given CPU is is registered. --HG-- extra : convert_revision : a093c9331daa675d4b59a321e53a5da6ea292c40
2005-06-29Fix uninitialized variables in ide controllerNathan Binkert
dev/ide_ctrl.cc: Initialize variables to zero to avoid uninitialized usage. --HG-- extra : convert_revision : 98fd0bfc2b7530938c6ab3a55345d0e594098238
2005-06-29Formatting.Benjamin Nash
--HG-- extra : convert_revision : c26a04563d571aae2b509eadf9f3eb5f61f3b2f7
2005-06-29Formatting and decrerease maximum number of children in functional memory.Benjamin Nash
SConscript: Adjust formatting. --HG-- extra : convert_revision : 3665c763f389084136ea88ffbd765a00c49c52c5
2005-06-29Merge m5read@m5.eecs.umich.edu:/bk/m5Benjamin Nash
into zed.eecs.umich.edu:/z/benash/bk/m5 --HG-- extra : convert_revision : a27bb3737d8a7d5c1fadf27f4cb5018d0b6054da
2005-06-29Allow CPUs to specify their own CPU ids.Nathan Binkert
Make the AlphaConsole calculate the number of CPUs instead of passing that in as a parameter. cpu/base.cc: pass the desired cpu_id into registerExecContext, offsetting it by the thread number. a cpu_id of -1 means that it should be generated for you. cpu/base.hh: Take the cpu_id as a parameter cpu/o3/alpha_cpu_builder.cc: cpu/simple/cpu.cc: Accept the cpu_id as a parameter while we're here, let's remove the multiplier since it is not used. dev/alpha_console.cc: don't take the number of CPUs as a parameter. Calculate it from the system based on the number of CPUs that have been registered. move init() code to startup() to ensure that all CPUs are registerd. dev/alpha_console.hh: python/m5/objects/AlphaConsole.py: don't take the number of CPUs as a parameter. move init() code to startup() to ensure that all CPUs are registerd. python/m5/objects/BaseCPU.py: take the cpu_id as a parameter. Default it to -1 which means that it will be generated. sim/system.cc: allow the registerExecContext functioin to take a desired cpu_id as a parameter. Check to ensure that the id isn't already used. Accept -1 as a request to have an id assigned. sim/system.hh: keep track of the number of registered exec contexts. provide a function for accessing the number of exec contexts that checks to ensure that they are all registered correctly. --HG-- extra : convert_revision : 8e12f96ff8a49fa16cdbbdb4c05c651376c35788
2005-06-28Merge m5read@m5.eecs.umich.edu:/bk/m5Benjamin Nash
into zed.eecs.umich.edu:/z/benash/bk/m5 --HG-- extra : convert_revision : 453615c8194ae9ca96330b7493c6b19fc89c3a72
2005-06-28Don't hard code the location of m5AlphaAccess. Instead, move theNathan Binkert
code into a function that can be called by the AlphaConsole class. AlphaConsole will pass in its address. arch/alpha/ev5.hh: Move Phys2K0Seg to ev5.hh and fixup the TSUNAMI uncacheable bits so that they will be converted correctly. dev/alpha_access.h: Do not hard code the location of the AlphaConsole dev/alpha_console.cc: fixup #includes tell the system where the alpha console is sim/system.hh: Provide a function that will tell the system where the AlphaAccess structure (device) lives --HG-- extra : convert_revision : 92d70ca926151a32eebe9925de597459ac58013e
2005-06-28Pass the location of the m5 console backdoor to the consoleNathan Binkert
instead of compiling it into the console version dev/alpha_access.h: move serialization stuff to alpha_console.hh define the ALPHA_ACCESS_BASE in m5 instead of in console.c and have m5 pass the value to the console dev/alpha_console.cc: dev/alpha_console.hh: Move serialization stuff into a derived class of AlphaAccess sim/system.cc: pass the value of ALPHA_ACCESS_BASE to the console code via the m5AlphaAccess console variable. --HG-- extra : convert_revision : 0ea4ba239f03d6dad51a6efae0385aa543064117
2005-06-27Reorganize tap code so that more than one method can be usedNathan Binkert
for accessing physical packets. Add support for tap devices found on linux and bsd. --HG-- extra : convert_revision : 198b082f2e847da8471c3f22d6a55beb9f4b592e
2005-06-27Change IDE disk and ethernet device to work better with FreeBSD.Benjamin Nash
dev/ide_ctrl.cc: dev/ide_disk.cc: dev/ide_disk.hh: Add support for 32-bit accesses. dev/ns_gige.cc: Change default configuration register value to work with FreeBSD driver. --HG-- extra : convert_revision : c9dd125338a97ffa8cd95293e6b7877068652387
2005-06-27Update for console code reorganizationNathan Binkert
dev/alpha_access.h: Update the ALPHA_ACCESS_VERSION move typedefs to this file since they're only used here. dev/alpha_console.cc: formatting sim/system.cc: xxm -> m5 --HG-- extra : convert_revision : 3aeca50d1385034f5a1e20dd8b0abd03bd6f26f0
2005-06-27Implement a state machine clock that acutally limits how fastNathan Binkert
the nsgige state machine can run. The frequency is of the actual state transitions, and not the rate of what underlying instructions might run at. dev/ns_gige.cc: Implement a state machine clock that acutally limits how fast the state machine can run. After each state transition, a variable is kept to hold the next state transition until the next clock. The frequency is of the actual state transitions, and not the rate of what underlying instructions might run at. dev/ns_gige.hh: Add back the rxKickEvent and txKickEvent events. python/m5/objects/Ethernet.py: Default the state machine clock to '0ns' so the default behaviour doesn't change when we actually implement the state machine clock. --HG-- extra : convert_revision : 2db1943dee4e91ea75aaee6a91e88f27f01a09dd
2005-06-27rename m5scons.py scons_helper.pyNathan Binkert
--HG-- extra : convert_revision : faaacc493b8da5d002d498e10cfa8cf004aafeed
2005-06-23Merge m5read@m5.eecs.umich.edu:/bk/m5Benjamin Nash
into zed.eecs.umich.edu:/z/benash/bk/m5 --HG-- extra : convert_revision : a0a8fea7224913ef106dc733182abd938feab64d
2005-06-23Changed timer functionality, ide disk interrupts, and TsunamiFake class to ↵Benjamin Nash
improve FreeBSD compatibility. dev/ide_disk.cc: Make ide disk set interrupts correctly. dev/tsunami_io.cc: dev/tsunami_io.hh: Implement read of timer counts. kern/freebsd/freebsd_system.cc: kern/freebsd/freebsd_system.hh: Remove SkipFuncEvents that we don't need to skip. python/m5/objects/Tsunami.py: Add size parameter to TsunamiFake class. --HG-- extra : convert_revision : a87e74f2cac0036060ca8cb3fde4760d8c91a5db
2005-06-23Added Float classAli Saidi
Fixed printing so the tokenizer in m5 doesn't get confused Expanded NullSimObject so it could be used as an element in a VectorParam --HG-- extra : convert_revision : 661b1916967d663ab7aee891f15f7ca190deeba6
2005-06-22Move max_time and progress_interval parameters to the RootNathan Binkert
object and get rid of the ParamContext that each used to have. python/m5/objects/Root.py: Add max_time and progress_interval to the Root object sim/root.cc: Add max_time and progress_interval to the Root object. These parameters used to be in their own contexts in sim_events.cc sim/sim_events.cc: Get rid of the ParamContext for max cycles and the progress event. Move the functionality to the Root object sim/sim_events.hh: Move ProgressEvent declaration to the header so that it can be used in other files. --HG-- extra : convert_revision : ff664b806855e8eb9201b8a25392aa53204464f0
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