| Age | Commit message (Collapse) | Author |
|---|
|
sim/serialize.cc:
sim/serialize.hh:
export the checkpoint directory
--HG--
extra : convert_revision : ba5b796fd930ab0487a502beefcf76bd6bb7c366
|
|
name to make statistical sampling easier.
--HG--
extra : convert_revision : b24db4ef747b8ef00a0131db237e97de60c27dc3
|
|
--HG--
extra : convert_revision : ad13cd0c7d700ec75ed98f517cbde3147e698940
|
|
EM_ALPHA value.
base/loader/elf_object.cc:
EM_ALPHA value isn't official, so perhaps we shouldn't use it
dev/alpha_console.cc:
dev/alpha_console.hh:
this change allows the use of old console code
--HG--
extra : convert_revision : cfacd64ae7fd2595158ca1a83ebcdb66ee7e119b
|
|
linux can share
--HG--
extra : convert_revision : 7417031db632255749d2a8201d761a001fb7de2e
|
|
base/traceflags.py:
removed TsunamiUart/TlaserUart and added a plain Uart
dev/alpha_console.cc:
updated for new simconsole
dev/platform.hh:
added a uart member to platform
dev/simconsole.cc:
dev/simconsole.hh:
removed lots of legacy code, it should all be ours now.
converted tabs to 8 spaces
added our copyright
dev/tsunami.cc:
uses simconsole.hh rather than console.hh
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
never needed console.hh
dev/tsunami_io.hh:
this does need eventq.hh and it just happend to be working whenn console.hh was
included everywhere
dev/tsunamireg.h:
added a couple more 8250/16550 uart defines
dev/uart.cc:
new uart code, rewritten to support both tlaser and tsunami (both a 8250 and 8530
uart).
dev/uart.hh:
updated for new uart, legacy code removed
--HG--
rename : dev/console.cc => dev/simconsole.cc
rename : dev/console.hh => dev/simconsole.hh
rename : dev/tsunami_uart.cc => dev/uart.cc
rename : dev/tsunami_uart.hh => dev/uart.hh
extra : convert_revision : e663352d49d4c2d3c95643030cf73c0e85ba2f08
|
|
base/intmath.hh:
only need FloorLog2(size_t) on a mac, so ifdefed for this
dev/alpha_console.cc:
Actually allocate the alphaAccess struct.
--HG--
extra : convert_revision : 1f50b1a025c8ee728a9f3d2c603ea38347234f54
|
|
--HG--
extra : convert_revision : d4938c6011173d3017f47fd592c4b5e4c8d543a3
|
|
disks are properly detected and handled
--HG--
extra : convert_revision : ffc3046deb68458ee2ef6fa5263dc471488abc45
|
|
dev/alpha_console.cc:
rather than acessing a byte array for alpha access, access the members
**this requires an updated console**
dev/pcidev.cc:
correctly type all the pci data and store in in little endian no
matter what system we are on
dev/tsunami_uart.cc:
correct a bug with the data type.
kern/linux/linux_system.cc:
system type in hwprb needs to be endian happy as well.
--HG--
extra : convert_revision : 8de9bb69365b5d30fceaf4fa342a1639f92d7a83
|
|
--HG--
extra : convert_revision : 448f6e7851c14dd2c9f6148122da873a19c20772
|
|
arch/alpha/alpha_memory.cc:
arch/alpha/ev5.hh:
Ifdefed TLASER code
arch/alpha/vtophys.cc:
added back some code andrew removed and couldn't remember why.
--HG--
extra : convert_revision : f00d255f7a8a7bdb6e74f061dd014188e3b39e73
|
|
--HG--
extra : convert_revision : 27868e84419a4bc2b9abf59a813b8c8acb8c6083
|
|
--HG--
extra : convert_revision : 345f91c5c16c69db22035dc716e82fd77041380f
|
|
These are not used at all right now, and will certainly change
over time, but the tedious job of extracting them from .cc files
is done.
--HG--
extra : convert_revision : b1b30cdf523fe457449f7779f8c7951adab648b5
|
|
base/misc.cc:
Don't dump trace in panic(), SIGABRT handler will do it now.
sim/main.cc:
Add SIGABRT handler that prints curTick and dumps buffered trace (if any).
This doesn't work as well as I would like since the buffered trace records
often contain stale references to stack-resident temporary std::string objects.
Someday we'll have to put in a fix for that.
--HG--
extra : convert_revision : 67576efbf5c10e63e255fc9a9ec520326fd3567b
|
|
--HG--
extra : convert_revision : ae2975894c9c4aeec65466ff9798a0420b4c7782
|
|
in the store buffer.
--HG--
extra : convert_revision : c70cba4d5976b21967a53c7c728f2cbda1dfc183
|
|
DynInst field was being set only on memory faults. If an FP
memory op encountered an FP enable fault, then the bogus memory
op would still get processed since the pipeline relied on the
inst->fault field to tell if the op was bogus.
--HG--
extra : convert_revision : 7435d712a464ce71b518425e0580aa22822fb901
|
|
base/traceflags.py:
added some more traceflags for ethernet to break it up better
dev/etherpkt.hh:
since we are not network host order, must reverse bytes for these typechecks.
also, overload isTcp/UdpPkt to take an argument so you don't have to reget the ip header if you've already got one.
dev/ns_gige.cc:
1) add some functions that reverse Endianness so we can generate adn evaluate checksum adn dprintf data accurately/more understandably
2) forget about the implementation of fifo fill/drain thresholds, it's not used by the driver much, nor does it matter with use sending/receiving in whole packets anyway.
get rid of teh associated variables.
3) get rid of txFifoCnt the variable, it's redundant and unnecessary, just use txFifoAvail.
4) change io_enable to ioEnable, just to be picky.
5) modify some DPRINTF's to be clearer, also added a lot, and spread them into better traceflag categories
6) fix the device bug! it's the intrTick = 0 at teh beginning of cpuInterrupt().
7) clear some bools in regsReset() so they don't holdover wrong state
8) fix pseudo header generation for Tcp checksumming to account for network order
dev/ns_gige.hh:
change io_enable to ioEnable, get rid of fill/drain thresh related variables and txFifoCnt, which is redundant
--HG--
extra : convert_revision : c538b75731f3c9e04354f57e6df9a40aeca5096d
|
|
into ali-saidis-computer.local:/research/linux
--HG--
extra : convert_revision : 446dc5fad11a6b29954dc5b1e974430853aa2969
|
|
base/inifile.cc:
Added mac os support and fixed a bug, on error we need to exit the
child process not return
base/intmath.hh:
gcc on macos wanted a seperate function for the size_t type
base/loader/elf_object.cc:
I'm not sure why this works under linux because it seems to return
the wrong value.
base/stats/text.cc:
added define/include for mac os x
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.cc:
added endian conversion code
dev/alpha_console.cc:
rather than accessing a charecter array of varying size depending on
the access, lets actually do this properly.
dev/alpha_console.hh:
get rid of now nolonger used consoleData
dev/disk_image.cc:
We have to byte swap the data is some cases, added function to do that
dev/ethertap.cc:
added preproc directive for mac os
--HG--
extra : convert_revision : 2b5685765cfa2844926d7397f363d2788e3d640a
|
|
cpu/simple_cpu/simple_cpu.cc:
called basecpu serialization
--HG--
extra : convert_revision : 1a639b5e3c08e47a5d581c18b2b53fe87bd05b73
|
|
tests
dev/ide_ctrl.cc:
Formatting
dev/ide_disk.cc:
Remove some junk, add an assert to serialize, and add missing serialize
for command register.
--HG--
extra : convert_revision : 8f99857e32f278dd4e6f23deffc8047c6411d5b2
|
|
--HG--
extra : convert_revision : aecf09b3b13a23ffef852a1539e8d4eec32008ad
|
|
builds
dev/ide_ctrl.cc:
added #if to remove variables that are optimized out.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Updated serialization code
--HG--
extra : convert_revision : b322a3299097cbd05b9b5bb8b0a80e9fa33bdc20
|
|
--HG--
extra : convert_revision : b492c3537b4ae443bfd2c4d8f17cebead389dfc6
|
|
into isabel.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision : 1af377ff2dbe27f357410ab91a50b06c61f12e83
|
|
Mostly a matter of keeping prefetches to invalid addrs
from messing up VM IPRs. Also discovered that wh64s were
not being treated as prefetches, when they really should be
(for the most part, anyway).
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
- Get rid of intrlock flag for locking VM fault regs (a la EV5);
instead, just don't update regs on VPTE loads (a la EV6).
- Add NO_FAULT MemReq flag to indicate references that should not
cause page faults (i.e., prefetches).
arch/alpha/ev5.cc:
- Get rid of intrlock flag for locking VM fault regs (a la EV5);
instead, just don't update regs on VPTE loads (a la EV6).
- Add Fault trace flag.
arch/alpha/isa_desc:
- Add NO_FAULT MemReq flag to indicate references that should not
cause page faults (i.e., prefetches).
- Mark wh64 as a "data prefetch" instruction so it gets controlled
properly by the FullCPU data prefetch control switch.
- Align wh64 EA in decoder so issue stage doesn't need to worry about it.
arch/alpha/isa_traits.hh:
- Get rid of intrlock flag for locking VM fault regs (a la EV5);
instead, just don't update regs on VPTE loads (a la EV6).
base/traceflags.py:
- Add Fault trace flag.
cpu/simple_cpu/simple_cpu.hh:
- Pass MemReq flags to writeHint() operation.
cpu/static_inst.hh:
Update comment re: prefetches.
--HG--
extra : convert_revision : 62e466b0f4c0ff9961796270fa2e371ec24bcbb6
|
|
to use for future papers. Notable changes include a 3 level
cache hierarchy, a bug fix in the main memory bandwidth and
narrowing of the machine.
--HG--
extra : convert_revision : db0da82b0adaa5fa3413354e6d36bff9e3bd37dc
|
|
--HG--
extra : convert_revision : 48081c86da3f7959957e35f8ec868da55c68b5ce
|
|
into zizzer.eecs.umich.edu:/z/ehallnor/work/m5
--HG--
extra : convert_revision : 88c83150b7fd9260e0441334f2503b1e029d8c09
|
|
--HG--
extra : convert_revision : 4a085c5d8526d1bf3f7155cda40002281c0c3d1b
|
|
dev/ide_ctrl.cc:
generalize these #defs
dev/ide_ctrl.hh:
put these in pcireg.h
dev/ns_gige.cc:
do i need io_enable? and assert will fail if i actually need to implement it, which may give clue as to wehtehr i need to implmeent the mem_enable and bm_enable stuff.
dev/ns_gige.hh:
implement this in case it's needed
dev/pcireg.h:
put these defs in pcireg instead
--HG--
extra : convert_revision : 5e3581b5da17410f943907139bd479f15d2231e8
|
|
--HG--
extra : convert_revision : cf5fd4aeaf96787345e233ddcd58f5eae55e0c27
|
|
dev/ns_gige.cc:
fix serialization and move regsReset into the cc file
dev/ns_gige.hh:
put regsReset into cc instead of here in hh
--HG--
extra : convert_revision : 3a8796fa583e0765503104a9dbe28cc69f1a8fa9
|
|
--HG--
extra : convert_revision : 67a36f724800b74fd0fcec9727bb2ea98ddc73e9
|
|
busbridges. Also small fix for gcc 3.3.3.
dev/etherpkt.hh:
Gcc 3.3.3 wants assert.h to be include in this file.
dev/ide_ctrl.cc:
after unserialization we need to tell the busbridges what addresses to
respond to.
--HG--
extra : convert_revision : a421197a5be07761bdef571d0a9406d77788e270
|
|
--HG--
extra : convert_revision : da08795d48bd7b82fdfb7443e4ffa7e45c037a0c
|
|
into lush.(none):/z/hsul/work/linux
--HG--
extra : convert_revision : 30b93e7a4548a00ba18e86aad85df4c790f51d43
|
|
struct defs into ined_hdrs.hh
3) add some new functions to etherpkt. 4) checkin the nice ping_linux.ini that i've been using.
dev/etherpkt.hh:
remove the packet headers nate hated so much.
also add some new functionality regarding packets, like isIpHdr(), etc.
dev/ns_gige.cc:
improve the code given the nice new functions offered in etherpkt
--HG--
extra : convert_revision : 2e27f5a8dca5323c0fa22d3c51af44a35f6be1a2
|
|
and started cleaning up config files.
arch/alpha/isa_desc:
Made implementation of cttz and ctlz more compact
base/remote_gdb.cc:
Added comment about PALcode debugger accesses
dev/baddev.cc:
dev/baddev.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
Cleaned up includes and changed device from FunctionalMemory to
PioDevice for detailed boot
dev/ns_gige.cc:
The ethernet dev uses two BARs, and the first bars size was being set
incorrectly.
dev/tsunamireg.h:
I don't know why we were using the superpage as the PCI memory addr.
Changed and works correctly with detailed boot.
--HG--
extra : convert_revision : b535e76612cb90b544305dc1aa8c5e0e774564bd
|
|
cpu/exec_context.hh:
lift kernel_stats out in the linux tree.
--HG--
extra : convert_revision : 866c7f82d8b995b4dce295de1ab0980527d13f01
|
|
into shizzle.(none):/home/hsul/work/m5clean
--HG--
extra : convert_revision : 97a6fbe1d48c2f8855bd1b0971130b991dd48a80
|
|
--HG--
extra : convert_revision : 91723409e22f36622b99309a3af227ea0c382cc7
|
|
cpu/exec_context.hh:
change this to reflect the lifted kernel stats file.
--HG--
extra : convert_revision : 0dda3babdf51ee7a57430af69c7e20322b4eb622
|
|
Adaptec additions (will stay in BitKeeper revision history)
--HG--
extra : convert_revision : f2e073fd5a34332e6f4b780bde6b948b486e3f68
|
|
--HG--
extra : convert_revision : 68b4f1cc414ab67e7bd19682854ef3f0b28986c0
|
|
--HG--
extra : convert_revision : 10205d5b7bd10a5894dde9481d0909e909760874
|
|
the source tree for *.odesc files every time we run the script.
This is now factored out into load_odesc.py, which should be used
to generate m5odescs.py, which is then used as the source of object
& parameter definitions.
util/config/m5configbase.py:
- Move odesc loading code to separate load_odescs.py, so maybe someday
that can be done once at build time.
- Print out children of a node in the order they are added.
- Automatically assign a parent-less node to the first node for which it
is used as the value of a parameter. (Easier demonstrated than explained.)
- Calculate object paths dynamically when requested rather than trying
to keep them up to date as objects get assigned to parents.
--HG--
rename : util/config/m5config.py => util/config/m5configbase.py
extra : convert_revision : 2183a09d32f3862ab377e0a929715f30505a03cb
|
