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AgeCommit message (Expand)Author
2017-09-26sim: Add a NullSimObject.descendants function.Gabe Black
2017-09-26sim: Add a clear_parent function to NullSimObject.Gabe Black
2017-09-26sim: Check the SimObjectVector.has_parent function to use the "any" function.Gabe Black
2017-09-26sim: Only consider non-NULL elements in SimObjectVector.has_parent.Gabe Black
2017-09-26sim: Add a set_parent to NullSimObject which does nothing.Gabe Black
2017-09-25mem: Fill the new packet ID fields with master IDs when tracing packets.Gabe Black
2017-09-25mem: Add a "map" of packet IDs to strings in probe traces.Gabe Black
2017-09-25mem: Trace the request master ID in the MemTraceProbe.Gabe Black
2017-09-25mem: Record the request master ID in the PacketInfo structure.Gabe Black
2017-09-25dev, virtio: Improvements to diod process handlingAnouk Van Laer
2017-09-21alpha: Move some initialization logic from loadState into unserialize.Gabe Black
2017-09-21sim: Stop using loadState in the Root SimObject.Gabe Black
2017-09-20kvm: arm: Get rid of functions which just wrap the subclasses version.Gabe Black
2017-09-11tlm: Don't set SystemC time resolutionMatthias Jung
2017-09-11stats: Move the swpipl function into the Alpha kernel stats.Gabe Black
2017-09-11stats: Get rid of some kernel stats related cruft.Gabe Black
2017-09-06cpu: Fix bi-mode branch predictor thresholdsRico Amslinger
2017-09-01cpu-minor: Fix for addr range coverage calculationPau Cabre
2017-08-31scons: bump required python version to 2.7 to support pybind11Paul Rosenfeld
2017-08-30arch-arm: Only increment SW PMU counters on writes to PMSWINCJose Marinho
2017-08-30arch-arm: Add missing override keywords in fault.hhAndreas Sandberg
2017-08-30arch-x86: Add missing override in the X86 TLBAndreas Sandberg
2017-08-30arch-sparc: Add a FaultVals instantiation for VecDisabledAndreas Sandberg
2017-08-30arch-alpha: Add missing overridesAndreas Sandberg
2017-08-30python: Make GlobalExitEvent.getCode() return an intAndreas Sandberg
2017-08-30cpu-o3: fix data pkt initialization for split loadMatthias Hille
2017-08-28x86: Use the new CondInst format for moves to/from control registers.Gabe Black
2017-08-28x86: Add a "CondInst" format for conditionally decoded instructions.Gabe Black
2017-08-12dev: Fix an IDE error check.Gabe Black
2017-08-08mem-cache: Delete squashed HWPrefetchesPau Cabre
2017-08-03configs, arm: Fix incorrect use of mem_range in bL exampleAndreas Sandberg
2017-08-03arm, config: Fix CPU names in ARM example configsAndreas Sandberg
2017-08-02base: Give more information when setting up asynchronous IO fails.Gabe Black
2017-08-01misc: git ignore file udpatedÉder F. Zulian
2017-08-01style: Add shared gem5 headers to the style checkerAndreas Sandberg
2017-08-01util: Move m5op.h to the shared include directoryAndreas Sandberg
2017-08-01util, m5: Use consistent naming for m5op C symbolsAndreas Sandberg
2017-08-01arch-arm: Use named constants for m5op instructionsAndreas Sandberg
2017-08-01sim: Use named constants for pseudo opsAndreas Sandberg
2017-08-01util: Move the m5ops.h file to a shared directoryAndreas Sandberg
2017-08-01kvm, arm: Switch to the device EQ when accessing ISA devicesAndreas Sandberg
2017-08-01kvm: Add a helper method to access device event queuesAndreas Sandberg
2017-08-01cpu, kvm: Fix deadlock issue when resuming a drained systemAndreas Sandberg
2017-08-01arch-arm: Switch to DTOnly as the default machine typeAndreas Sandberg
2017-07-28config: Discover CPU timing models based on target ISAAndreas Sandberg
2017-07-27config, arm: SE configuration for the ARM starter kitGabor Dozsa
2017-07-27config, arm: FS configuration for the ARM starter kitGabor Dozsa
2017-07-27config, arm: Add a high-performance in order timing modelAshkan Tousi
2017-07-27config: Change mem_range attribute naming in ARM SimpleSystemGabor Dozsa
2017-07-25tests: Fix path for module imports in ARM system configsNikos Nikoleris