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2017-02-14sim: allow forward dependencies in checkpoint upgradersCurtis Dunham
The notion of forward dependencies is just expressing the same dependency but at the other end of the dependency edge, i.e. at the dependee rather than the depender. As there is no more 'power' here, it's strictly a convenience feature for handling dependencies with tags that are not in the upstream repository. Change-Id: Ic7c68de6aff4094aaa12de62cdf690a5dc65ccb5 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-02-14sim: add support for checkpoint downgradingCurtis Dunham
This commit supports the use case of transitioning tags and their associated checkpoint rewrites out of use for whatever reason. Just replace the upgrader() method with a downgrader() method that performs the appropriate inverse operation. The tag name is still used, but only in this negative, 'zombie' state, as it will be removed from the tags in the checkpoint and gem5 binary. Change-Id: If9d26cccfe8449e026762b1a72f0c2ae5a9cf2d7 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-02-13riscv: Remove ECALL tests from insttestAlec Roelke
The system calls tested in rv64i.cpp in RISC-V's insttest suite have different behavior depending on the operating system and file system they are run on. This patch ignores the output of those tests and only ensures that the instructions in RV64I complete successfully. [Change deletion of ECALL test to block comment.] [Restore ECALL test but remove test output to test only for completion without error.] [Update patch description and again try to push EMPTY files for rv64i tests.]
2017-02-13misc: Clean up and complete the gem5<->SystemC-TLM bridge [6/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Update the README
2017-02-12ruby: fix round robin arbiter in garnet2.0Tushar Krishna
The rr arbiter pointer in garnet was getting updated on every request, even if there is no grant. This was leading to a huge variance in wait time at a router at high injection rates. This patch corrects it to update upon a grant.
2017-02-11mem: fix printing of 1st cache tags lineBjoern A. Zeeb
Rather than having the 1st line on the Log line and every other line on its own, add a new line to have a common format for all of them. Makes parsing a lot easier. Reviewed at http://reviews.gem5.org/r/3808/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-10x86: Fix implicit stack addressing in 64-bit modeJason Lowe-Power
When in 64-bit mode, if the stack is accessed implicitly by an instruction the alternate address prefix should be ignored if present. This patch adds an extra flag to the ldstop which signifies when the address override should be ignored. Then, for all of the affected instructions, this patch adds two options to the ld and st opcode to use the current stack addressing mode for all addresses and to ignore the AddressSizeFlagBit. Finally, this patch updates the x86 TLB to not truncate the address if it is in 64-bit mode and the IgnoreAddrSizeFlagBit is set. This fixes a problem when calling __libc_start_main with a binary that is linked with a recent version of ld. This version of ld uses the address override prefix (0x67) on the call instruction instead of a nop. Note: This has not been tested in compatibility mode and only the call instruction with the address override prefix has been tested. See [1] page 9 (pdf page 45) For instructions that are affected see [1] page 519 (pdf page 555). [1] http://support.amd.com/TechDocs/24594.pdf Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-10misc: Update #!env calls for python to explicit versionJason Lowe-Power
In some newer Linux distributions, env python default to Python 3.0. This patch explicitly uses "python2" instead of just "python" for all scripts that use #! Reported-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-10misc: Add Python.h header to pyevents.hhJason Lowe-Power
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [10/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Add callbacks for the Gem5SimControl that are called at before and * after simulate() Reviewed at http://reviews.gem5.org/r/3799/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [9/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Pay for the header delay that the gem5 XBar annotates to packets. Reviewed at http://reviews.gem5.org/r/3798/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [8/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * bugfix: The BEGIN_RESP also needs to be handled when END_REQ was * skipped and '&trans == blockingRequest && phase == tlm::BEGIN_RESP' evaluates to true. Reviewed at http://reviews.gem5.org/r/3797/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [7/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Implement 'pipe through' for gem5 Packets (see explanation below) Basically, this patch ensures that all transactions that originated in the gem5 world are converted back to the original packet when entering the gem5 world. So far, this only worked for packets that are responded to by a SyctemC component (e.g. when a gem5 CPU sends a request to a SystemC memory). By implementing the 'pipe through' this patch ensures, that packets that are responded to by a gem5 component (e.g. when a gem5 CPU sends a request to a gem5 memory via a SystemC interconnect) are handled properly. Reviewed at http://reviews.gem5.org/r/3796/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/10]Christian Menard
Changeset 11798:3a490c57058d --------------------------- misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/10] The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Introduce transactor modules that represent the gem5 ports in the * SystemC world. * Update the SimControl module and let it keep track of the gem5 ports. Reviewed at http://reviews.gem5.org/r/3775/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [4/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Move common code of the example to a common directory. Move the cli * parsing from the SimControl module to a separate example object. Add * comments describing the Gem5SimControl module. Testing Done: Examples compile and run. Reviewed at http://reviews.gem5.org/r/3695/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [3/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Simplify the Slave Port by using a simple_initiator_socket. Testing Done: Example applications are still running. Reviewed at http://reviews.gem5.org/r/3686/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [2/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Add the Master Port. Add an example application that isslustrates its * use. Testing Done: A simple example application consisting of a TLM traffic generator and a gem5 memory is part of the patch. Reviewed at http://reviews.gem5.org/r/3528/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Clean up and complete the gem5<->SystemC-TLM bridge [1/10]Christian Menard
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Restructure the existing sources in preparation of the addition of the * new Master Port. * Refractor names to allow for distinction of the slave and master port. * Replace the Makefile by a SConstruct. Testing Done: The examples provided in util/tlm (now util/tlm/examples/slave_port) still compile and run error free. Reviewed at http://reviews.gem5.org/r/3527/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: add a MasterId to the ExternalPortChristian Menard
The Request constructor requires a MasterID. However, an external transactor has no chance of getting a MasterID as it does not have a pointer to the System. This patch adds a MasterID to ExternalMaster to allow external modules to easily genrerate new Requests. Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: fix includes in util/systemcChristian Menard
This fixes compilation errors with clang on OS X. Reviewed at http://reviews.gem5.org/r/3807/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Fix order of object construction in the CxxConfigManagerChristian Menard
The CxxConfigManager schould create objects by traversing the object tree starting from the root object. However, currently objects are created in aplphabetical order, which only works if the root object alphabetically comes before any system object (e.g. 'root' < 'system'. Otherwise (e.g. 'a_system' < 'root'), object construction may fail. The reason for this behaviour is, that the call to findObject() in the sorting code also constructs the object if it is not yet existent. Then findTraversalOrder() calls findObject("root") and subseqeuently calls findObject() on all the children, and so on. However, the call to findTraversalOrder() is redundant, since all objects are already created in alphabetical order. This patch simply removes the alphabetical ordering, leading to the objects being created starting from 'root'. Reviewed at http://reviews.gem5.org/r/3778/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09misc: Implement the Base SystemC Module as an sc_channel.Christian Menard
Implementing the Module as an sc_channel allows derived classes to provide SystemC interfaces. Other SystemC modules can connect to these interfaces. This meachanism can be used to control gem5 and acces gem5 components from within arbitrary SystemC moduels. Since sc_channel is derived from sc_module, this patch does not break compatibility with existing code. Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09sim: fix build breakage in process.cc after brandon@11801Bjoern A. Zeeb
Seeing build breakage after brandon@11801: [ CXX] X86/sim/process.cc -> .o build/X86/sim/process.cc:137:64: error: field '_pid' is uninitialized when used here [-Werror,-Wuninitialized] static_cast<PageTableBase *>(new ArchPageTable(name(), _pid, system)) : ^ build/X86/sim/process.cc:138:64: error: field '_pid' is uninitialized when used here [-Werror,-Wuninitialized] static_cast<PageTableBase *>(new FuncPageTable(name(), _pid))), ^ 2 errors generated. Testing Done: Compiles now on FreeBSD 10 with clang. Reviewed at http://reviews.gem5.org/r/3804/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09sim: Patch to fix the statfs buildBjoern A. Zeeb
See developers mailing list. Trying to unbreak statfs. Testing Done: Builds on FreeBSD now. Reviewed at http://reviews.gem5.org/r/3803/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09scons: make build better on FreeBSDBjoern A. Zeeb
Various changes we found needed to build gem5 successfully on FreeBSD. Reviewed at http://reviews.gem5.org/r/3378/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09dev: net/i8254xGBe add two more wakeup registers to ignoreBjoern A. Zeeb
There are drivers writing to WUFC uncondtionally of anything. In order to not panic gem5 in these cases, ignore writes to WUFC and WUS as we do for WUC. Similarly return 0 (default reset value) on reads. Testing Done: Booted in FS with such a driver revision which would previously panic and now boots fine. Reviewed at http://reviews.gem5.org/r/3791/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-09arm: AArch64 report cache size correctly when reading CTR_EL0Bjoern A. Zeeb
Trying to read MISCREG_CTR_EL0 on AArch64 returned 0 as is was not implmemented. With that an operating system relying on the cache line sizes reported in order to manage the caches would (a) panic given the returned value 0 is not valid (high bit is RES1) or (b) worst case would assume a cache line size of 4 doing a tremendous amount of extra instruction work (including fetching). Return the same values as for ARMv7 as the fields seem to be the same, or RES0/1 seem to be reported accordingly for AArch64 In collaboration with: Andrew Turner Testing Done: Checked on FreeBSD boots with extra printfs; also observed a reduction of a factor of about 10 in instruction fetches for a simple micro-test. Reviewed at http://reviews.gem5.org/r/3667/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-02-07style: Force Python.h to be included before main headerAndreas Sandberg
Python's header files set various compiler macros (e.g., _XOPEN_SOURCE) unconditionally. This triggers preprocessor warnings that end up being treated as errors. The Python integration manual [1] strongly recommends that Python.h is included before any system header. The style guide used to mandate that Python.h is included first in any file that needs it. This requirement was changed to always include a source file's main header first, which ended up triggering these errors. This change updates the style checker to always include Python.h before the main header file. [1] https://docs.python.org/2/extending/extending.html Change-Id: Id6a4f7fc64a336a8fd26691a0ca682abeb1d1579 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Pierre-Yves PĂ©neau <pierre-yves.peneau@lirmm.fr>
2017-01-27proto: Fix warnings for protoc v3Nikos Nikoleris
protoc v3 introduces a new syntax for proto files and warns when the syntax is not explicitly stated. protoc relies on the fact that undefined preprocessor symbols are explanded to 0 but since we use -Wundef they end up generating warnings. Change-Id: If07abeb54e932469c8f2c4d38634a97fdae40f77 Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-01-27riscv: Fix crash when syscall argument reg index is too highAlec Roelke
By default, doSyscall gets the values of six registers to be used for system call arguments. RISC-V, by convention, only has four. Because RISC-V's implementation of these indices is as arrays of integers rather than as base indices plus offsets, trying to get the fifth argument register's value will cause a crash. This patch fixes that by returning 0 for any index higher than 3. Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-01-27misc: Add support for switching multiple cores in SystemCPaul Rosenfeld
This patch adds a '-n' flag to the gem5 SystemC driver which allows multiple CPUs to be switched out to a new CPU. Primarily this involves appending CPU numbers to the objects searched for in the config manager if there are multiple CPUs in the system. Note that an equivalent change should be made to the util/cxx_config driver, but I wanted to get input on this first before making the same change over there Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-01-27mem: Refactor CommMonitor stats, add basic atomic mode statsRahul Thakur
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-01-27mem: Add memory footprint probeRahul Thakur
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-01-27python: Move native wrappers to the _m5 namespaceAndreas Sandberg
Swig wrappers for native objects currently share the _m5.internal name space with Python code. This is undesirable if we ever want to switch from Swig to some other framework for native binding (e.g., PyBind11 or Boost::Python). This changeset moves all of such wrappers to the _m5 namespace, which is now reserved for native code. Change-Id: I2d2bc12dbc05b57b7c5a75f072e08124413d77f3 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2016-11-09syscall_emul: [patch 4/22] remove redundant M5_pid field from processBrandon Potter
2016-11-09style: [patch 3/22] reduce include dependencies in some headersBrandon Potter
Used cppclean to help identify useless includes and removed them. This involved erroneously included headers, but also cases where forward declarations could have been used rather than a full include.
2017-01-20syscall_emul: #ifdef new system calls to allow builds on OSX and BSDBrandon Potter
2017-01-19ruby: guard usage of GPUCoalescer code in ProfilerTony Gutierrez
the GPUCoalescer code is used in the ruby profiler regardless of whether or not the coalescer code has been compiled, which can lead to link/run time errors. here we add #ifdefs to guard the usage of GPUCoalescer code. eventually we should refactor this code to use probe points.
2017-01-19ruby: Check MessageBuffer space in garnet NetworkInterfaceMatthew Poremba
Garnet's NetworkInterface does not consider the size of MessageBuffers when ejecting a Message from the network. Add a size check for the MessageBuffer and only enqueue if space is available. If space is not available, the message if placed in a queue and the credit is held. A callback from the MessageBuffer is implemented to wake the NetworkInterface. If there are messages in the stalled queue, they are processed first, in a FIFO manner and if succesfully ejected, the credit is finally sent back upstream. The maximum size of the stall queue is equal to the number of valid VNETs with MessageBuffers attached.
2017-01-19ruby: Add occupancy stats to MessageBuffersMatthew Poremba
This patch is an updated version of /r/3297. "The most important statistic for measuring memory hierarchy performance is throughput, which is affected by independent variables, buffer sizing and communication latency. It is difficult/impossible to debug performance issues through series buffers without knowing which are the bottlenecks. For finite buffers, this patch adds statistics for the average number of messages in the buffer, the occupancy of the buffer slots, and number of message stalls."
2017-01-19ruby: Check all VNETs for injection in garnet NetworkInterfaceMatthew Poremba
The NetworkInterface wakeup currently iterates over all VNETs and breaks the loop if a VNET is unable to allocate a VC. This can cause a deadlock if a lower numbered VNET is unable to allocate a VC while a higher numbered VNET has idle VCs. This seems like a bug as Garnet 1.0 uses a while loop over an if-statement, suggesting the break was intended for this while loop. This patch removes the break statement, which allows up to one message to be dequeued from a VNET and injected into the network.
2016-11-09syscall_emul: [patch 2/22] move SyscallDesc into its own .hh and .ccBrandon Potter
The class was crammed into syscall_emul.hh which has tons of forward declarations and template definitions. To clean it up a bit, moved the class into separate files and commented the class with doxygen style comments. Also, provided some encapsulation by adding some accessors and a mutator. The syscallreturn.hh file was renamed syscall_return.hh to make it consistent with other similarly named files in the src/sim directory. The DPRINTF_SYSCALL macro was moved into its own header file with the include the Base and Verbose flags as well. --HG-- rename : src/sim/syscallreturn.hh => src/sim/syscall_return.hh
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2017-01-09misc: fixes deprecated sc_time function for SystemC 2.3.1Matthias Jung
The non-standard sc_time constructors - sc_time( uint64, bool scale ) - sc_time( double, bool scale ) have been deprecated in SystemC 2.3.1 and a warning is issued when being used. Insted the new 'sc_time::from_value' function is used to omit the warning message. Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-01-09misc: Documentation UpdateMatthias Jung
Updates for READMEs of /util/cxx_config, /util/systemc, /util/tlm. Some minor corrections, mostly with respect to MAC/OSX Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2017-01-09config: Fix missing include in fs.pyMatthias Jung
Bugfix for Elastic Traces This patch fixes the bug when elastic traces are used: build/ARM/gem5.opt \ configs/example/fs.py \ --cpu-type=arm_detailed \ --num-cpu=1 \ --mem-type=SimpleMemory \ --mem-size=512MB \ --mem-channels=1 \ --caches \ --elastic-trace-en \ --data-trace-file=data.proto.gz \ --inst-trace-file=inst.proto.gz \ --machine-type=VExpress_EMM \ --dtb-filename=vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb \ --kernel=vmlinux.aarch32.ll_20131205.0-gem5 \ --disk-image=linux-aarch32-ael.img NameError: global name 'CpuConfig' is not defined Signed-off by: Jason Lowe-Power <jason@lowepower.com>
2017-01-03sim: Remove declaration of unused CountedDrainEventAndreas Sandberg
The CountedDrainEvent event was used to keep track of objects that required additional simulation to drain. It was removed as a part of the great drain rewrite, but the declaration remained. Change-Id: I767a3213669040d3f27e2afafa2e4a5bb997e325 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2017-01-03python: Don't use Swig to cast statsAndreas Sandberg
Call the stat visitor from the stat itself rather than casting stats in Python. This reduces the number of ways visitors are called. Change-Id: Ic4d0b7b32e3ab9897b9a34cd22d353f4da62d738 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Joe Gross <joseph.gross@amd.com>
2017-01-03sim: Remove redundant export_method_cxx_predeclsAndreas Sandberg
The headers declared in export_method_cxx_predecls are redundant since a SimObject's main header is automatically included. Change-Id: Ied9e84630b36960e54efe91d16f8c66fba7e0da0 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Joe Gross <joseph.gross@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-01-03util: Add maintainer tools to create upstream patchesAndreas Sandberg
This changeset adds a maintainer script, create_patches.sh, that can be used to prepare for upstream from a git repository. The script can be used to generate patches in Mercurial or git format. The commit messages in the exported patches are all filtered, see upstream_msg_filter.sed, to ensure that irrelevant meta data isn't included in the upstream commit. Kudos to Curtis Dunham and Nikos Nikoleris for reviews and usability enhancements for earlier versions of this patch. Change-Id: Ia4cd089a32834b5e046ef58c0a173ca285b77bca Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>