gem5 - gem5

Age	Commit message (Expand)	Author
2008-02-26	Update make release, README, and RELEASE_NOTES for b5	Ali Saidi
2008-02-26	Bus: Update the stats for the recent bus fix.	Gabe Black
2008-02-26	Bus: Fix the bus timing to be more realistic.	Gabe Black
2008-02-22	add instruction count fast forwaing and max instruction options	Vilas Sridharan
2008-02-19	Added ARM_SE as a build option.	Stephen Hines
2008-02-16	Update stats for new writeback behavior.	Steve Reinhardt
2008-02-16	Make L2+ caches allocate new block for writeback misses	Steve Reinhardt
2008-02-16	Update stats for some unknown minor x86 changes	Steve Reinhardt
2008-02-14	CPU: move the PC Events code to a place where the code won't be executed mult...	Ali Saidi
2008-02-14	Configs: Change Simulation.py to return a subclass of the CPU models rather t...	Ali Saidi
2008-02-11	Update copyright dates	Ali Saidi
2008-02-11	Automated merge with file:/home/stever/hg/m5-orig	Steve Reinhardt
2008-02-11	EXTRAS now points to src instead of needing 'src' subdir.	Steve Reinhardt
2008-02-11	Wait to set BUILD_DIR until after env is copied.	Steve Reinhardt
2008-02-10	Bus: Only update port cache when there is an item to update it with.	Nicolas Zea
2008-02-10	IGbE: Fix a couple of bugs.	Ali Saidi
2008-02-10	Fix #include lines for renamed cache files.	Steve Reinhardt
2008-02-10	Rename cache files for brevity and consistency with rest of tree.	Steve Reinhardt
2008-02-06	Make the Event::description() a const function	Stephen Hines
2008-02-05	Add base ARM code to M5	Stephen Hines
2008-02-05	Cleaned up os.path imports a bit.	Steve Reinhardt
2008-02-05	Make EXTRAS work for SConsopts too.	Steve Reinhardt
2008-01-23	X86: Put an SMBios/DMI table in memory.	Gabe Black
2008-01-23	X86: Optomize the bit scanning instruction microassembly a little. More can b...	Gabe Black
2008-01-22	X86: Implement and attach the BSR and BSF instructions.	Gabe Black
2008-01-21	X86: Fill out group17 in the decoder.	Gabe Black
2008-01-21	X86: Use the existing boot_osflags instead of duplicating it.	Gabe Black
2008-01-16	Update long o3 regressions for o3 change in previous changeset	Ali Saidi
2008-01-15	Update O3 ref outputs: very minor stats change due to previous cset.	Steve Reinhardt
2008-01-14	The reason is that the event is supposed to put the instructions ready to exe...	Ke Meng
2008-01-12	X86: Redo the bit test instructions.	Gabe Black
2008-01-12	X86: Fix the wrmsr instruction.	Gabe Black
2008-01-12	X86: Make the effective segment base shadow the regular one, not the selector.	Gabe Black
2008-01-12	X86: Make the IO ports work using extra physical address lines. Add a serial ...	Gabe Black
2008-01-12	X86: Fix the general IO instructions dataSize.	Gabe Black
2008-01-06	Temporary fix for ll/sc bug see flyspray task for more info:	Geoffrey Blake
2008-01-02	Very minor memtest regression stats changes from recent coherence bug fixes.	Steve Reinhardt
2008-01-02	Add ReadRespWithInvalidate to handle multi-level coherence situation	Steve Reinhardt
2008-01-02	Mark cache-to-cache MSHRs as downstreamPending when necessary.	Steve Reinhardt
2008-01-02	Don't DPRINTF in the middle of a PrintReq.	Steve Reinhardt
2008-01-02	Bug fix: functional cache port now needs otherPort set.	Steve Reinhardt
2008-01-02	Additional comments and helper functions for PrintReq.	Steve Reinhardt
2008-01-02	Add functional PrintReq command for memory-system debugging.	Steve Reinhardt
2008-01-02	Fix formatting and comments in cache_impl.hh	Steve Reinhardt
2008-01-01	SPARC: Fix a bug where the TLB would match against the wrong entries.	Gabe Black
2007-12-18	Checkpointing: Fix a bug in the simulation script when restoring without stan...	Ali Saidi
2007-12-16	CPU: Update where the simple cpus read their cpu id from the thread context t...	Ali Saidi
2007-12-11	Fix minor bug in util/style.py	Steve Reinhardt
2007-12-03	X86: Update the parser reference output which has mysteriously changed again?	Gabe Black
2007-12-03	X86: Please excuse my dear Aunt Sally. (precedence bug)	Gabe Black