gem5 - gem5

Age	Commit message (Expand)	Author
2006-10-26	se.py:	Lisa Hsu
2006-10-26	Merge zizzer:/bk/newmem	Ali Saidi
2006-10-25	Fix simple timing port keep a list of all packets, have only one event, and s...	Ali Saidi
2006-10-25	Fixed the priv instruction format.	Gabe Black
2006-10-25	Implemented the saved and restored instructions, fixed up register window ins...	Gabe Black
2006-10-25	Fixed the bitfield FCN to include the right bits.	Gabe Black
2006-10-25	Implemented the SPARC fill and spill handlers.	Gabe Black
2006-10-25	Fix fixPacket functionality to calculate sizes properly	Ron Dreslinski
2006-10-24	Replace the Alpha No op with a SPARC one.	Gabe Black
2006-10-24	Fix fs.py. Lisa did you test this? Is there some wierd python version thing?	Ali Saidi
2006-10-24	Merge zizzer:/bk/newmem	Ali Saidi
2006-10-24	Add more traceflags for ethernet	Ali Saidi
2006-10-24	Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem	Steve Reinhardt
2006-10-23	warmup of 1B cpu cycles.	Lisa Hsu
2006-10-23	Merge zizzer:/bk/newmem	Lisa Hsu
2006-10-23	get rid of the "resume" step at the end of changeToTiming/Atomic because this...	Lisa Hsu
2006-10-23	make this parallel to the other cpu types so that resume works correctly.	Lisa Hsu
2006-10-23	make a lot of the same changes as to fs.py for checkpointing.	Lisa Hsu
2006-10-23	changes regarding fs.py	Lisa Hsu
2006-10-23	Minor compile fix. Not sure why this is broken.	Gabe Black
2006-10-23	Move around more SPARC memory code, and make block memory operations work wit...	Gabe Black
2006-10-23	Merge zizzer.eecs.umich.edu:/bk/newmem	Gabe Black
2006-10-23	Add reference outputs for SPARC on the atomic timing cpu model	Gabe Black
2006-10-23	Broke Load/Store instructions into microcode, and partially refactored memory...	Gabe Black
2006-10-23	Don't let interupts interupt microcode at undesired points.	Gabe Black
2006-10-23	Files in base shouldn't depend on things in sim. Changed "sim/host.hh" to <in...	Gabe Black
2006-10-23	Start making memory ops work with InitiateAcc and CompleteAcc, and some minor...	Gabe Black
2006-10-23	Change the default constructors to take ExtMachInsts rather than regular Mach...	Gabe Black
2006-10-22	Clean up cache DPRINTFs	Steve Reinhardt
2006-10-22	s/pktuest/request/ (all in comments)	Steve Reinhardt
2006-10-22	Add DPRINTF for non-timed quiesce.	Steve Reinhardt
2006-10-22	Add mutex test to Benchmarks.py.	Steve Reinhardt
2006-10-22	Another missing case in a switch (like Nate's earlier fix).	Steve Reinhardt
2006-10-22	Have tracediff print warning if no traceflags are set.	Steve Reinhardt
2006-10-21	Small bug fixes for timing LL/SC. Better now but	Steve Reinhardt
2006-10-21	Add Quiesce trace flag to track CPU quiesce/wakeup events.	Steve Reinhardt
2006-10-21	Just give up if a store conditional misses completely	Steve Reinhardt
2006-10-21	Fix formatting that got screwed up when tabs were removed.	Steve Reinhardt
2006-10-21	Refactor coherence state table initialization.	Steve Reinhardt
2006-10-21	Merge vm1.(none):/home/stever/bk/newmem-head	Steve Reinhardt
2006-10-21	Get rid of unused handleTargets() function.	Steve Reinhardt
2006-10-21	Tweak a few things for better page fault debugging.	Steve Reinhardt
2006-10-21	Updated to work with new command line argument ordering.	Steve Reinhardt
2006-10-21	Merge zizzer.eecs.umich.edu:/bk/newmem	Nathan Binkert
2006-10-21	Missing case	Nathan Binkert
2006-10-20	Add some default options, point it to the /dist version of the splash benchmarks	Ron Dreslinski
2006-10-20	Merge zizzer:/bk/newmem	Ron Dreslinski
2006-10-20	Clean up splash2 so it works in v2.0	Ron Dreslinski
2006-10-20	Merge zizzer.eecs.umich.edu:/bk/newmem	Gabe Black
2006-10-20	Construct a correct value of PYTHONHOME from the interpreter	Nathan Binkert