summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2016-09-29ruby: correct size for partial memory writesBrad Beckmann
Fixed AbstractController::queueMemoryWritePartial to specify the correct size for partial memory writes.
2016-09-29mem: minor dprintf fix to abstract memBrad Beckmann
print number of bytes written as a decimal number, not hex
2016-09-22arm: disable GIC extensionsCurtis Dunham
Change-Id: If19b9c593b48ded1ea848f2d3710d4369ec8a221 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-09-22tests, arm: Reinstate accidentally removed switcheroo testsAndreas Sandberg
Two of the switcheroo tests were accidentally removed due to unexpected Mercurial behavior. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-09-22cpu: Fix the O3 CPU DrainRekai Gonzalez-Alberquilla
The drain did not wait until stages were ready again. Therefore, as a result of messages in the TimeBuffer being drain, the state after the drain was not consistent and asserts fired in some places when the draining happened after a stage got blocked, but before the notification arrived to the previous stages. Change-Id: Ib50b3b40b7f745b62c1eba2931dec76860824c71 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-09-22test: Make the memtest and memcheck tests functional onlyAndreas Sandberg
The memtest and memcheck are not designed to test timing. Make them functional only to make ref diffs less noisy in the future. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-09-22tests: Make remaining switcheroo tests functional onlyAndreas Sandberg
The switcheroo tests only really serve to check functional correctness. Checking for stat differences in them just increases the size of reference diffs. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-09-20ext: update SST test configCurtis Dunham
Align configuration with new SST change [1] requiring units for memHierarchy's backend.mem_size parameter. [1] https://github.com/sstsimulator/sst-elements/commit/c901abb4e79644ff18f5222c94f5dae012772e1e Change-Id: I19fa09bec8aa453dc52d154598a4ebb20ea304d8
2016-09-16gpu-compute: fix typo in GPUDispatcherTony Gutierrez
2016-09-16hsail: Fix disassembly of load instruction with 3 destination operandsAlexandru Dutu
2016-09-16gpu-compute: Adding context serialization methods to WavefrontAlexandru Dutu
This patch adds methods to serialize the context of a particular wavefront to the simulated system memory. Context serialization is used when a wavefront is preempeted (i.e. context switch).
2016-09-16gpu-compute: Refactoring Wavefront::dynWaveIdAlexandru Dutu
2016-09-16gpu-compute: Adding vector register file debug messagesAlexandru Dutu
This patch introduces DPRINTFs for reading and writing to and from the vector register file.
2016-09-16gpu-compute: Changing reconvergenceStack typeAlexandru Dutu
std::stack has no iterators, therefore the reconvergence stack can't be iterated without poping elements off. We will be using std::list instead to be able to iterate for saving and restoring purposes.
2016-09-16gpu-compute: Adding ioctl for HW context sizeAlexandru Dutu
Adding runtime support for determining the memory required by a SIMD engine when executing a particular wavefront.
2016-09-16gpu-compute: Wavefront refactoringAlexandru Dutu
Renaming members of the Wavefront class in accordance with the style guide.
2016-09-16gpu-compute: Remove WFContextAlexandru Dutu
WFContext struct is currently unused and it has been rendered not useful in saving and restoring the context of a Wavefront. Wavefront class should be sufficient for that purpose and the runtime can figure out the memory size it will need to allocate for a Wavefront through an IOCTL.
2016-09-16tests, arm: Make switcheroo and checkpoint tests functionalAndreas Sandberg
Switcheroo and checkpoint tests should generally be considered to be successful if they run to completion. Remove all reference output files from the switcheroo and checkopint tests to make them purely functional. Change-Id: I70b47853bd662b7a33716d9e0d2154b16077f9dc Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2016-09-16tests: Add support for functional only testsAndreas Sandberg
Modify the ClassicTest class to only emit a stat verification test unit if there is a reference stat file. This makes it possible to design tests that don't care about stat changes. To generate purely functional tests, we need to be able to create empty test reference directories. This does not work well with many revision control systems. As a workaround, add a file named EMPTY to the list of ignored files in the test harness. This file can be used as a placeholder in otherwise empty test directories. Change-Id: I583c8c4e55479f0d48fa99d0b0d1eac9221e6652 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2016-09-15base: eliminate ipython warningCurtis Dunham
Change-Id: I3e282baeb969b6bb9534813a2f433d68246c0669 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-09-15arm: Add m5_fail support for aarch64Ricardo Alves
Change-Id: Id2acbc09772be310a0eb9e33295afab07e08a4fa Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-09-15cpu: Support exit when any one Trace CPU completes replayRadhika Jagtap
This change adds a Trace CPU param to exit simulation early, i.e. when the first (any one) trace execution is complete. With this change the user gets a choice to configure exit as either when the last CPU finishes (default) or first CPU finishes replay. Configuring an early exit enables simulating and measuring stats strictly when memory-system resources are being stressed by all Trace CPUs. Change-Id: I3998045fdcc5cd343e1ca92d18dd7f7ecdba8f1d Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-09-15cpu: Adjust for trace offset and fix statsRadhika Jagtap
This change subtracts the time offset present in the trace from all the event times when nodes and request are sent so that the replay starts immediately when the simulation starts. This makes the stats accurate when the time offset in traces is large, for example when traces are generated in the middle of a workload execution. It also solves the problem of unnecessary DRAM refresh events that would keep occuring during the large time offset before even a single request is replayed into the system. Change-Id: Ie0898842615def867ffd5c219948386d952af7f7 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-09-15cpu: Add frequency scaling to the Trace CPURadhika Jagtap
This change adds a simple feature to scale the frequency of the Trace CPU. The compute delays in the input traces provide timing. This change adds a freqency multiplier parameter to the Trace CPU set to 1.0 by default. The compute delay is manipulated to effectively achieve the frequency at which the nodes become ready and thus scale the frequency of the Trace CPU. Change-Id: Iaabbd57806941ad56094fcddbeb38fcee1172431 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-09-15arm, config: Fixups for the example big.LITTLE(tm) configurationGabor Dozsa
This patch refactors the configuration file to use a more object-oriented design. Change-Id: I44ac2d063c2b5901f385544fb6ce3f259459cb05 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
2016-09-13kvm: Support timing accesses for KVM cpuMichael LeBeane
This patch enables timing accesses for KVM cpu. A new state, RunningMMIOPending, is added to indicate that there are outstanding timing requests generated by KVM in the system. KVM's tick() is disabled and the simulation does not enter into KVM until all outstanding timing requests have completed. The main motivation for this is to allow KVM CPU to perform MMIO in Ruby, since Ruby does not support atomic accesses.
2016-09-13x86: Force strict ordering for memory mapped m5opsMichael LeBeane
Normal MMAPPED_IPR requests are allowed to execute speculatively under the assumption that they have no side effects. The special case of m5ops that are treated like MMAPPED_IPR should not be allowed to execute speculatively, since they can have side-effects. Adding the STRICT_ORDER flag to these requests blocks execution until the associated instruction hits the ROB head.
2016-09-13sim: Refactor quiesce and remove FS assertsMichael LeBeane
The quiesce family of magic ops can be simplified by the inclusion of quiesceTick() and quiesce() functions on ThreadContext. This patch also gets rid of the FS guards, since suspending a CPU is also a valid operation for SE mode.
2016-09-13config: move dist-gem5 options to common configMichael LeBeane
dist-gem5 should not be restricted to FullSystem mode.
2016-09-13dev: Add a DmaCallback class to DmaDeviceMichael LeBeane
This patch introduces the DmaCallback helper class, which registers a callback to fire after a sequence of (potentially non-contiguous) DMA transfers on a DmaPort completes.
2016-09-13sim, syscall_emul: Add mmap to EmulatedDriverMichael LeBeane
Add support for calling mmap on an EmulatedDriver file descriptor.
2016-09-13gpu-compute: Fix bug with return in cfgMichael LeBeane
Connecting basic blocks would stop too early in kernels where ret was not the last instruction. This patch allows basic blocks after the ret instruction to be properly connected.
2016-09-13dev: Exit correctly in dist-gem5Michael LeBeane
The receiver thread in dist_iface is allowed to directly exit the simulation. This can cause exit to be called twice if the main thread simultaneously wants to exit the simulation. Therefore, have the receiver thread enqueue a request to exit on the primary event queue for the main simulation thread to handle.
2016-09-13misc: Remove FullSystem check for networking componentsMichael LeBeane
Ethernet devices are currently only hooked up if running in FS mode. Much of the Ethernet networking code is generic and can be used to build non-Ethernet device models. Some of these device models do not require a complex driver stack and can be built to use an EmulatedDriver in SE mode. This patch enables etherent interfaces to properly connect regardless of whether the simulation is in FS or SE mode.
2016-09-13base: Output all AddrRange parameters to config.iniMatt Poremba
Currently only 'start' and 'end' of AddrRange are printed in config.ini. This causes address ranges to be overlapping when loading a c++-only config with interleaved addresses using CxxConfigManger. This patch adds prints for the interleave and XOR bits to config.ini such that address ranges are properly setup with cxx config.
2016-09-06dev, arm: Add a customizable NoMali GPU modelAndreas Sandberg
Add a customizable NoMali GPU model and an example Mali T760 configuration. Unlike the normal NoMali model (NoMaliGpu), the NoMaliCustopmGpu model exposes all the important GPU ID registers to Python. This makes it possible to implement custom GPU configurations by without changing the underlying NoMali library. Change-Id: I4fdba05844c3589893aa1a4c11dc376ec33d4e9e Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com>
2016-09-02ext: eliminate warnings in SST connectorCurtis Dunham
Now compiles completely clean.
2016-08-24commit 15c633eea52f21dae8cb3a195823b3cdec7be491Curtis Dunham
Author: Curtis Dunham <Curtis.Dunham@arm.com> ext: update SST connector for SST 6.0
2016-08-22config: KVM acceleration for apu_se.pyDavid Hashe
Add support for using KVM to accelerate APU simulations. The intended use case is to fast-forward through runtime initialization until the first kernel launch.
2016-08-22tests: Add example of using KVM acceleration with an appDavid Hashe
Add #ifdef's to gpu-hello.cpp demonstrating how to annotate an application for KVM acceleration.
2016-08-22cpu, mem, sim: Change how KVM maps memoryDavid Hashe
Only map memories into the KVM guest address space that are marked as usable by KVM. Create BackingStoreEntry class containing flags for is_conf_reported, in_addr_map, and kvm_map.
2016-08-16dev: Revert 0a316996de76 [dev, sim: Added missing override...]Andreas Sandberg
This changeset reverts the changset "dev, sim: Added missing override keywords to fix CLANG compilation (OSX)" which was incorrectly rebased. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-08-15cpu: Add missing override in Minor's exec contextAndreas Sandberg
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-08-15cpu: Fixed clang errors. Added 'override' keyword for virtual functions.Reiley Jeapaul
Change-Id: Ic37311443ca11ee6d95bceffea599e054e7aa110 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-08-15mem: Print an MSHR without triggering any assertionsNikos Nikoleris
Previously printing an mshr would trigger an assertion if the MSHR was not in service or if the targets list was empty. This patch changes the print function to bypasses the accessor functions for postInvalidate and postDowngrade and avoid the relevant assertions. It also checks if the targets list is empty before calling print on it. Change-Id: Ic18bee6cb088f63976112eba40e89501237cfe62 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-08-15dev, sim: Added missing override keywords to fix CLANG compilation (OSX)Matteo Andreozzi
Change-Id: Ice5fa11e77d06576eaa42149f5fa340a769d8b01 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-08-15cpu, arch: fix the type used for the request flagsNikos Nikoleris
Change-Id: I183b9942929c873c3272ce6d1abd4ebc472c7132 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-08-13tests: remove EIO testsSteve Reinhardt
An email sent to gem5-users and gem5-dev asking if anyone was still using EIO traces got no responses, so it seems like it's not worth maintaining this any longer.
2016-08-12stats: Update to match classic memory changesAndreas Sandberg
2016-08-12mem: Add support for secure packets in the snoop filterNikos Nikoleris
Secure and non-secure data can coexist in the cache and therefore the snoop filter should treat differently packets with secure and non secure accesses. This patch uses the lower bits of the line address to keep track of whether the packet is addressing secure memory or not. Change-Id: I54a5e614dad566a5083582bede86c86896f2c2c1 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 12:43:59 +0000