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2018-08-15systemc: Remove more Accellera source specific include paths in tests.Gabe Black
Some more tests were including Accellera headers specifically, even after including systemc.h which would bring those headers in alongside all the others. Change-Id: Ib2db0a410e0ecea0035b636e8dd04c85045b8578 Reviewed-on: https://gem5-review.googlesource.com/11179 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Include boost/bind.hpp in the systemc header.Gabe Black
The systemc spec says that sc_bind, sc_ref and sc_cref macros should expand to boost::bind, boost::ref, and boost::cref respectively, but that it's "use is not mandantory". Unfortunately, the regression tests use those macros without actually including the boost headers for themselves, and so they won't compile without dragging in these boost headers as a dependency. This should be mostly ok to include here since gem5 itself shouldn't include systemc, just the sub headers that systemc brings in. systemc code which includes systemc *will* have a dependency on boost, but that at least contains the new dependency somewhat. Change-Id: I1877a1b7dae2952f30a9d577d778739abbe7ac3b Reviewed-on: https://gem5-review.googlesource.com/11178 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Fill out some of the sc_vector.hh classes.Gabe Black
The iterator class needs to have some operators, etc., defined so that tests written against it can compile correctly. The implementations were heavily influenced by the Accellera implementation. Also it should be noted that the systemc spec is incorrect where it defines these classes. When implemented like they are in the Accellera version, the versions of bind in sc_vector_assembly which take sc_vector<T>::iterator and iterator parameters are different, and so they can overload each other. If implemented as described by the spec however, those types are the same and the code won't compile. Change-Id: I62852adf7e6c0a2f3df076ba4e93d2501859c32d Reviewed-on: https://gem5-review.googlesource.com/11177 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Make a test stop including an internal path for sc_vector.Gabe Black
The sc_vector class is available through systemc.h already, so there's no reason to include an internal path which is only there on Accellera by coincidence of the implementation. Change-Id: I41cab4711c0837cd9b20c21871b79be5165bf498 Reviewed-on: https://gem5-review.googlesource.com/11176 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Add a script which automates building and running tests.Gabe Black
The only required option for the script is the path to a build directory, for instance build/ARM. It uses that when running scons and when referring to generated files (like the built versions of the tests). It uses the location of the script itself to find source files, like the "golden" version of outputs. This script runs tests in three phases, compilation, running, and then verification. By default, all three phases are run for all tests, but which phases run and how they work can be customized by specifying them explicitly on the command line with the --phase option. Each time the --phase option shows up on the command line, it should be followed by the name of the phase being specified. That both declares that that phase should be run, and also that any subsequent options apply to that phase, at least until the next --phase option. Currently, only the "compile" and "execute" phases are implemented, and only the "compile" phase has been tested at all or has any options defined. The "compile" phase simply takes all the options it was given and pass them on to scons. The "verify" phase simply prints a message which says what it would have verified. The script can list the available tests with the --list option, as determined by the json systemc test manifest file which scons can generate, and which the script can refresh if passed the --update-json option. You can also specify what "flavor" of build you want to do, ie opt, debug, fast, etc., with the --flavor option. Only one flavor can be tested at a time, but that should be the desired behavior most of the time. If multiple flavors need to be tested, the script can be invoked multiple times. Finally, there is a --filter option which accepts a python expression as a string. That expression is evaluated in the namespace of the properties of each test in the json file, and if it returns true then that test is run. For instance, to verify only compile_only tests, you would use: systemc/tests/verify.py build/ARM --filter 'compile_only' To test only compile_only tests named bob, you would run this: systemc/tests/verify.py build/ARM --filter \ 'compile_only && name ="bob"' Also included is a simple config.py which is the beginning of a config which will run the systemc regression tests. Right now, all it knows how to do is run sc_main. Change-Id: I62666be8b1622d1355153e623b4274a939507e44 Reviewed-on: https://gem5-review.googlesource.com/10975 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc, scons: Link systemc tests against the shared gem5 library.Gabe Black
Otherwise, having hundreds of statically linked gem5s takes up a huge amount of space, and all those repeated linkings brings the mightiest workstation to its knees with sufficient parallelism, or will take forever without it. Change-Id: I4c358b1a50c5e2b0027ac72423f887e24c786b19 Reviewed-on: https://gem5-review.googlesource.com/10959 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Add in the deprecated binding port constructors.Gabe Black
These are needed by... you guessed it, the regression tests. Change-Id: Id30e71944cc7f3faca7dcb197f37938368364fcd Reviewed-on: https://gem5-review.googlesource.com/10958 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Add a non-standard default writer policy on sc_buffer.Gabe Black
The standard says there's not supposed to be a default writer policy for the sc_buffer template class, but in the Accellera implementation there is, and the regression tests depend on it to compile. Change-Id: I31d17617441224e86c56c54e45364be8f4f45b00 Reviewed-on: https://gem5-review.googlesource.com/10957 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc, scons: Add a mechanism to hook in the systemc tests.Gabe Black
This mechanism scans the systemc test directories as described in their original distribution. It tells scons how to build each test executable, and also how to build a json manifest file which lists all the tests and some properties about them. Change-Id: I8ebc748c1aed71f0bb76e04a2040f15abd2837d9 Reviewed-on: https://gem5-review.googlesource.com/10956 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Add the deprecated sc_signal_out_if typedef.Gabe Black
This is needed by the regression tests. Change-Id: I5666cf9ad445869e74edda857afd59ab7ece4f4c Reviewed-on: https://gem5-review.googlesource.com/10955 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Add the deprecated sc_module::end_module function.Gabe Black
The regression tests use this function. In the Accellera implementation it seems to just do some error checking, so our version doesn't do anything for now. Change-Id: Icaad45e934bad69e301bc0234f73e69791940736 Reviewed-on: https://gem5-review.googlesource.com/10854 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Construct and manage a module name stack.Gabe Black
Change-Id: I5f7f64d6c3d7e08ec6d2529f3c5d84fbfc2c421b Reviewed-on: https://gem5-review.googlesource.com/10850 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Make sc_main run in its own fiber.Gabe Black
The fiber will run until either sc_main returns, or until sc_start is called. If sc_start is called, then the fiber will only be paused and waiting for simulation cycles to be run by gem5. Once sc_pause and sc_stop are implemented, if those are called the sc_main fiber will be re-entered and allowed to run further towards completion. Change-Id: I4df94f4f6fed8d49471732619a203d734d9a13a6 Reviewed-on: https://gem5-review.googlesource.com/10849 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Implement some simple accessor functions in sc_main.cc.Gabe Black
These functions just read or write values with minimal amounts of logic. Change-Id: I22d5b49a2550a88a854d1619f08b0055c1312271 Reviewed-on: https://gem5-review.googlesource.com/10847 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-15systemc: Add some missing functions which interact with the scheduler.Gabe Black
Change-Id: Ifc8c8d4a7bb6e941485e80f4884cfa4bb648c17c Reviewed-on: https://gem5-review.googlesource.com/10846 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-10base: Replace cppversion == version with >= versionBradley
For forward compatibility with later compilers, we should have a greater than comparison instead of an explicit equality with a particular C++ version. Change-Id: If848097420b9575f80134986410da3dab32567da Signed-off-by: Bradley Wang <radwang@ucdavis.edu> Reviewed-on: https://gem5-review.googlesource.com/11871 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-10cpu: Add hash functionality for RegId classBradley Wang
Having a hash function defined within the header will allow all classes using RegId to use the class as a Key in a STL unordered_map. Change-Id: I32fd302a087c74e844dcbfce93fef9d0ed98d6bf Signed-off-by: Bradley Wang <radwang@ucdavis.edu> Reviewed-on: https://gem5-review.googlesource.com/11870 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-08-10cpu: Removed unnecessary file reg_class_impl.hhBradley Wang
Previously, reg_class_impl.hh was added in order to prevent a cyclic dependency between it and the_isa.hh (See http://reviews.gem5.org/r/3754). It was determined that this was not necessary. The two files had almost entirely the same includes, and the current test-suite including multiple gcc and clang compilers on both MacOS and Linux successfully built the library with all functionality moved into the reg_class.hh file. Change-Id: I0319e187b9eb280726a003951bb1ce315ffe17f5 Signed-off-by: Bradley Wang <radwang@ucdavis.edu> Reviewed-on: https://gem5-review.googlesource.com/11869 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-08-10arm: Add support for RCpc load-acquire instructions (ARMv8.3)Giacomo Gabrielli
Please note that at the moment these instructions behave like the existing load-acquire instructions, which follow the more conservative RCsc consistency model. This means that the new instructions are _functionally_ correct, but the potential performance improvements enabled by the RCpc model will not be experienced in timing simulations. Change-Id: I04c786ad2941072bf28feba7d2ec6e142c8b74cb Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-on: https://gem5-review.googlesource.com/11989 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2018-08-08systemc: Import tests from the Accellera systemc distribution.Gabe Black
Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6 Reviewed-on: https://gem5-review.googlesource.com/10845 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-08systemc: Add the Accellera implementation for the data type classes.Gabe Black
These files have been cleaned up style wise, and some macros have been resolved like they were for the header files. Change-Id: I447e5311961036847e7da0c5a86c0da25a633010 Reviewed-on: https://gem5-review.googlesource.com/10844 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-08Systemc: Port over all of the systemc "datatype" headers.Gabe Black
These are the headers originally written by Accellera with a few modifications. Most significantly, I went through and mostly (but not entirely) manually editted them to conform to gem5 style and to be more self consistent. Second, I resolved some macros which optionally select features. I removed support for deprecated functions, and otherwise enabled everything. The actual implementation behind these headers will also be ported over, but in a subsequent change. Change-Id: I203d3f6c8a3af9120b946001d01defbb0643a6b6 Reviewed-on: https://gem5-review.googlesource.com/10843 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-08systemc: Stub out all the standard utilility classes and functions.Gabe Black
Change-Id: I9e9724edb6281e0b0a6bae5546b0ede77d295c12 Reviewed-on: https://gem5-review.googlesource.com/10841 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-08-02arch-arm: Don't fail to initialise PMU if BP is missingAndreas Sandberg
The branch predictor currently assumes that each CPU has a branch predictor. This isn't true in some cases (e.g., KVM, Atomic). Change-Id: I61e80dca940c2dadba1b812449691c9dba1c06d9 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/11520 Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2018-07-28arch-riscv: Add xret instructionsAlec Roelke
This patch adds the uret, sret, and mret instructions for use with returning from user-, supervisor-, and machine-level code, respectively. These instructions read the STATUS register to determine the previous privilege level and modify it to re-enable interrupts at the old privilege level. These instructions can only be executed at the corresponding privilege level or higher. Change-Id: I6125c31cb2fdcc3f83eca86910519e81ffbbbfc9 Reviewed-on: https://gem5-review.googlesource.com/11136 Maintainer: Alec Roelke <alec.roelke@gmail.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Robert Scheffel <robert.scheffel1@tu-dresden.de>
2018-07-28arch-riscv: Add support for trap value registerAlec Roelke
RISC-V has a set of CSRs that contain information about a trap that was taken into each privilegel level, such as illegal instruction bytes or faulting address. This patch adds that register, modifies existing faults to make use of it, and adds a new fault for future use with handling page faults and bad addresses. Change-Id: I3004bd7b907e7dc75e5f1a8452a1d74796a7a551 Reviewed-on: https://gem5-review.googlesource.com/11135 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Alec Roelke <alec.roelke@gmail.com>
2018-07-28arch-riscv: Add support for fault handlingAlec Roelke
This patch adds support for handling RISC-V faults, including tracking current and previous execution privilege, correctly switching to the privilege mode specified by CSRs, and setting/storing the PC. It also includes changes introduced by patch #9821, which disables interrupts during handling of a fault. Change-Id: Ie9c0f29719620c20783540d3bdb2db44f6114fc9 Reviewed-on: https://gem5-review.googlesource.com/9161 Maintainer: Alec Roelke <ar4jc@virginia.edu> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2018-07-27misc: Update CONTRIBUTING with gerrit changesJason Lowe-Power
Change-Id: I39b5a784a056195a5e71fd21b3abb5fc91ab70e7 Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/11872
2018-07-26base: Fix ucontext compilation error for macOSGiacomo Travaglini
ucontext functions (like getcontext, setcontext etc) have been marked as deprecated and are hence hidden in latest macOS releases. This patch uncovers them; warnings wil be produced but compilation won't fail since -Wno-error=deprecated-declarations flag is currently used. Change-Id: Ic10e6f77a38875828b1891eaed2f0626ecffff67 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/11729 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-07-25cpu: Warn when (un)serializing a traffic generatorGiacomo Travaglini
When checkpointing a system with a traffic generator, a warning is produced so that the user is reminded serialization does not keep all the traffic generator internal state. Change-Id: I3c49c912c9ff3a4208f55b2da0a88fc694147280 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/11831 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-07-25cpu: Allow creation of traffic gen from generic SimObjectsGiacomo Travaglini
This patch allows to instantiate a Traffic generator starting from a generic SimObject, so that linking to a BaseTrafficGen only is no longer mandatory. This permits SimObjects different than a BaseTrafficGen to instantiate generators and to manually specify the MasterID they will be using when generating memory requests. Change-Id: Ic286cfa49fd9c9707e6f12a4ea19993dd3006b2b Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/11789 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-07-25mem-cache: TempCacheBlk allocates and destroys its own dataRobert Kovacsics
This change is because I want to make CacheBlk::data private, so that I can track all the places which write to it. But to keep that commit smaller (it is pretty big, because of all the places which might change it), I have split this into a commit of its own. Change-Id: I15a2fc1752085ff3681f5c74ec90be3828a559ea Reviewed-on: https://gem5-review.googlesource.com/11829 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-07-24systemc: Flesh out the sc_port implementation slightly.Gabe Black
This makes other files compile because it changes the relationship between constructors,etc., slightly. Change-Id: I8d9a6e12ec640a82da166fe05c4f5e91f3f608de Reviewed-on: https://gem5-review.googlesource.com/10840 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-24systemc: Stub out the predefined channels.Gabe Black
Change-Id: Ie030aad26875bd49e54981ec1e9076b7b5af6630 Reviewed-on: https://gem5-review.googlesource.com/10839 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-24systemc: Add systemc and systemc.h header files.Gabe Black
These are the header files as defined by the standard, although some predefined channel types and most of the sc_dt namespace have yet to be stubbed out, and so those portions are excluded. Change-Id: Ic70f887c06e591974a4265c820eb0fdfa740d19a Reviewed-on: https://gem5-review.googlesource.com/10838 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-24systemc: Stub out the sc_spawn related classes and functions.Gabe Black
Change-Id: I79f695cca97aaae9af324eb18cab073f42f0a193 Reviewed-on: https://gem5-review.googlesource.com/10837 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-24systemc: Stub out the sc_process_handle class.Gabe Black
Change-Id: I2250ccb369e0a5f2b9172d35662a9ce5e41ab1c1 Reviewed-on: https://gem5-review.googlesource.com/10836 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-24systemc: Seperate the "external" header interface.Gabe Black
Most (but not all) of the SystemC headers are part of the "external" interface that an existing, standard compliant module would include through <systemc.h> or <systemc>. Since those follow slightly different rules (relative includes, no gem5 includes), this change separates them out so that they're easier to identify. Also, this change moves the other files into a "core" subdirectory, with the intention to add a "dt", aka data type, directory some time in the future when those standard defined types are implemented. Change-Id: Ida63f9cc0bc0431024d4dd691cc5b22b944a99a8 Reviewed-on: https://gem5-review.googlesource.com/10835 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-24systemc: Stub out the sc_module class and related functions.Gabe Black
Change-Id: I2c20717fe1f750bf7ae84de79726b1503ec6e1cd Reviewed-on: https://gem5-review.googlesource.com/10834 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-24systemc: Add a stubbed out implementation of the sc_sensitive class.Gabe Black
This sc_sensitive class is mostly implementation defined, but has a few standards defined methods. Change-Id: I7157f6bfaaef38b5804b19a1de9f3f0aff08b697 Reviewed-on: https://gem5-review.googlesource.com/10833 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-24systemc: Add a stub implementation for sc_attr related classes.Gabe Black
Change-Id: I59ba11f71b5412643ea7026df91587fafa0c6fda Reviewed-on: https://gem5-review.googlesource.com/10832 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-24cpu-o3: Missing freeing the heads of DepGraph in IQ squashingHanhwi Jang
Free the squahsed instructions' heads of DepGraph in IQ squashing In a system with large register file (ex.2048), the number of DynInst hits the hardcoded limit (1500). This is caused by missing freeing the heads of DepGraph in IQ. IQ only clears out the heads when instructions reach writeback stage. If a instruction is squashed before writeback stage, its head of dependency graph, which holds the instruction's DynInstPtr, would not be cleared out. This prevents freeing the DynInst of the squahsed instruction even after it is committed. Change-Id: I05b3db93cb6ad8960183d7ae765149c7f292e5b3 Reviewed-on: https://gem5-review.googlesource.com/7481 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-07-23systemc: Add a stubbed out sc_event_finder class.Gabe Black
The standard defines this class very loosely, and so there isn't much in the stub definition. Change-Id: I2f8d07927a4eb087235e345a09d5a4d4891413b5 Reviewed-on: https://gem5-review.googlesource.com/10831 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-23systemc: Implement a stub version of the sc_prim class.Gabe Black
Change-Id: Iad32f6e385e62dc10491783c1e5cdd5d9bfcc3e6 Reviewed-on: https://gem5-review.googlesource.com/10830 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-23systemc: Add stubbed out versions of sc_port and sc_export.Gabe Black
Change-Id: I04edb5da995212f9179eeb7a97486031eea71aff Reviewed-on: https://gem5-review.googlesource.com/10829 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-23systemc: Add stubbed out versions of sc_event and related classes.Gabe Black
Change-Id: Id45c80cbb8774d8469d4df6ce7915161df977de0 Reviewed-on: https://gem5-review.googlesource.com/10828 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-23systemc: Add stubbed out versions of the sc_time functions.Gabe Black
Change-Id: Ie7e3eac0382dc2ed861eaa9ea53ab11069812db8 Reviewed-on: https://gem5-review.googlesource.com/10827 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-23systemc: Add the sc_nbdefs.hh header from Accellera.Gabe Black
This header defines the uint64 type alias needed for the sc_time class. Change-Id: I7793dbfb98001796c8c8fe24f69fe7868249ff85 Reviewed-on: https://gem5-review.googlesource.com/10826 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-23systemc: Add a stub version of the sc_interface class.Gabe Black
Change-Id: Iad1da472e13b0e16ad4de03f456ca0a001e69b51 Reviewed-on: https://gem5-review.googlesource.com/10825 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-07-23systemc: Hook up sc_main.Gabe Black
sc_main is exported as a python method on the SystemC_Kernel class and takes a series of string arguments. The internal c++ implementation converts those arguments into the standard argc and argv and uses them to call the standard SystemC version of that function. A weak SystemC version of sc_main is provided so that systemc will compile with or without a simulation provided version of that function. The weak version just complains and dies. Change-Id: Iad735536c37c8bc85d06cf24779f607ae4309b8b Reviewed-on: https://gem5-review.googlesource.com/10824 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>