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AgeCommit message (Expand)Author
2016-11-09syscall_emul: [patch 2/22] move SyscallDesc into its own .hh and .ccBrandon Potter
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2017-01-09misc: fixes deprecated sc_time function for SystemC 2.3.1Matthias Jung
2017-01-09misc: Documentation UpdateMatthias Jung
2017-01-09config: Fix missing include in fs.pyMatthias Jung
2017-01-03sim: Remove declaration of unused CountedDrainEventAndreas Sandberg
2017-01-03python: Don't use Swig to cast statsAndreas Sandberg
2017-01-03sim: Remove redundant export_method_cxx_predeclsAndreas Sandberg
2017-01-03util: Add maintainer tools to create upstream patchesAndreas Sandberg
2016-12-23sim: Fix SE mode checkpoint restore file handlingJoel Hestness
2016-12-21cpu: implement an L-TAGE branch predictorArthur Perais
2016-12-21cpu: disallow speculative update of branch predictor tables (o3)Arthur Perais
2016-12-21cpu: correct comments in tournament branch predictorArthur Perais
2016-12-21cpu: Resolve targets of predicted 'taken' decode for O3Arthur Perais
2016-12-21cpu: Clarify meaning of cachePorts variable in lsq_unit.hh of O3Arthur Perais
2016-12-20ruby: Make MessageBuffers actually finite sizedJoel Hestness
2016-12-20ruby: fix typo in DMASequencer::ackCallback()Tony Gutierrez
2016-12-20ruby: fix issue with unused var in DMASequencerTony Gutierrez
2016-12-19dist, dev: fix etherswitch upgrade scriptCurtis Dunham
2016-12-19stats: update referencesCurtis Dunham
2016-12-19arm: provide correct timer availability in ID_PFR1 registerCurtis Dunham
2016-12-19arm: compute ID_AA64PFR{0,1}_EL1 registersCurtis Dunham
2016-12-19arm: compute ID_PFR{0,1} registersCurtis Dunham
2016-12-19arm: miscreg refactoringCurtis Dunham
2016-12-19arm: audit SCTLRCurtis Dunham
2016-12-19arm: remove SCTLR.FICurtis Dunham
2016-12-19arm: update AArch{64,32} register mappingsCurtis Dunham
2016-12-19mem: Make the BaseXBar public to not confuse Python wrappersAndreas Sandberg
2016-12-19python: Export periodicStatDumpAndreas Sandberg
2016-12-19dev: Include DmaDevice in NULL buildsAndreas Sandberg
2016-12-19python: Fix incorrect header in the DmaDevice wrapperAndreas Sandberg
2016-12-19sim: Remove redundant buildEnv importAndreas Sandberg
2016-12-15ruby: Detect garnet network-level deadlock.Jieming Yin
2016-11-09base: remove header file to prevent a macro name collisionBrandon Potter
2016-12-15syscall_emul: implement fallocateBrandon Potter
2016-12-15syscall_emul: add support for x86 statfs system callsBrandon Potter
2016-12-15syscall_emul: extend sysinfo system call to include mem_unitBrandon Potter
2016-12-06dev: Fix race conditions at terminating dist-gem5 simulationsGabor Dozsa
2016-12-06arm, config: Add missing IOCache in bL configGabor Dozsa
2016-12-05ruby: Remove RubyMemoryControl and associated filesAndreas Hansson
2016-12-05stats: Update stats to reflect cache changesAndreas Hansson
2016-12-05config: Add an option to generate a random topology in memcheckNikos Nikoleris
2016-12-05config: Add whole line accesses to improve memchecker's coverageNikos Nikoleris
2016-12-05mem: Respond to InvalidateReq when the block is (pending) dirtyNikos Nikoleris
2016-12-05mem: Invalidate a blk when servicing the 1st invalidating targetNikos Nikoleris
2016-12-05mem: Allow non invalidating snoops on an InvalidateReq MSHRNikos Nikoleris
2016-12-05mem: Don't use hasSharers in the snoopFilter for memory responsesNikos Nikoleris
2016-12-05mem: Always use InvalidateReq to service WriteLineReq missesNikos Nikoleris
2016-12-05mem: Assert that the responderHadWritable is set only onceNikos Nikoleris
2016-12-05mem: Ensure InvalidateReq is considered isForward by MSHRsAndreas Hansson