Age | Commit message (Collapse) | Author |
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into zizzer.eecs.umich.edu:/.automount/ziff/z/binkertn/research/m5/memory
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base/range.hh:
Add a constructor that takes the beginning and end as arguments
size returns T not a bool
quick make_range() function that is a shortcut for making a range
kinda like make_pair()
quick formatting fix
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(bk auto merge messed these up...)
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arch/alpha/isa_desc:
Add cache port bindings for mb & wmb.
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Eventually the *.cc fils should be generate by our super-duper python script.
base/compression/null_compression.hh:
Need some includes.
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to be consistent with the way that the stl works. It also makes
lots of other stuff easier. (Maybe those guys were smart?)
Overload the various comparison operators so that you can test
for overlapping of ranges, etc.
base/range.hh:
Totally rework the Range class. Now the range is from [start, end)
to be consistent with the way that the stl works. It also makes
lots of other stuff easier. (Maybe those guys were smart?)
Overload the various comparison operators so that you can test
for overlapping of ranges, etc.
make parse function private and offer operator= instead
isValid -> valid
and for you erik, I add comments
test/Makefile:
add range.o
test/rangetest.cc:
better tests
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benchmarks for alpha-linux.
arch/alpha/alpha_linux_process.cc:
Added some more ioctl commands to ignore.
Set unlink and rename to the new functions.
Ignore setrlimit, times and rt_sigaction.
Should eventually provide a function for times.
arch/alpha/alpha_tru64_process.cc:
Added some more ioctl commands to ignore.
Set unlink and rename to the new functions.
Ignore setrlimit.
sim/syscall_emul.cc:
Added implementations for unlink and rename.
sim/syscall_emul.hh:
Added unlink and rename functions.
Added a couple more ioctl requests to ignore.
Print out the PC of any ioctl commands that fail.
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extra : convert_revision : 8af21c7fa7d0645d3f9324c9ce70ad33590c3c8e
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execution pipeline (Alpha trapb & excb).
Add support for write memory barriers (mostly impacts
store buffer).
Add StaticInst flag to indicate memory barriers, though
this is not modeled in the pipeline yet.
arch/alpha/isa_desc:
Implement trapb, excb, mb, and wmb as insts with
no execution effect (empty execute() function) but
with flags that indicate their side effects.
Also make sure every instruction that needs to go to
the execute stage has a real opClass value, since we
are now using No_OpClass to signal insts that can get
dropped at dispatch.
StaticInst::branchTarget() is now a const method.
cpu/static_inst.hh:
Add flags to indicate serializing insts (trapb, excb) and
memory and write barriers.
Also declare some StaticInst methods as const methods.
dev/etherlink.hh:
sim/eventq.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_object.hh:
Make name() return value const.
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The last change only caught the ones with types that
started with capitals. This pass catches the rest
(mostly STL and uint*_t types).
base/cprintf_formats.hh:
cpu/simple_cpu/simple_cpu.cc:
sim/serialize.cc:
sim/serialize.hh:
Change "foo_t& foo" to "foo_t &foo".
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into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest
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base/kgdb.h:
Remove flags that aren't used
base/remote_gdb.cc:
Better debugging:
- Give each class a name() function so that the trace infrastructure
knows the correct object name.
- Make the remote debugger capable of detach.
- Split out the RGDB trace flag into a bunch of specific flags.
Remove dead code
Add a new trap type
base/remote_gdb.hh:
Add a name() to the various objects for the trace system
base/trace.hh:
don't need a using directive
add DPRINTFNR: debug printf, no flag, raw output
kern/tru64/tru64_system.cc:
use the INT trap type instead of IF
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extra : convert_revision : 25e610216c6f43d5d328651bba915f71bade059e
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arch/alpha/isa_desc:
Add missing branchTarget() method for indirect branches.
cpu/static_inst.hh:
Add comment clarifying when branchTarget() can be used
on indirect branches.
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the ROB (so we know they're correct-path) before we mark them ready to issue.
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multithreading, which has been gone for a long time.
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Eliminate indirect decoder.cc dependence on rob_station.hh via full_cpu.hh.
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This primarily to be internally consistent (sometimes we used one,
sometimes the other, even within the same line of code!).
I picked the latter to be symmetric with "Foo *foo".
base/cprintf_formats.hh:
base/range.hh:
base/refcnt.hh:
base/res_list.hh:
base/statistics.hh:
base/str.hh:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/syscall_emul.hh:
Change "Foo& foo" declarations to "Foo &foo".
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extra : convert_revision : ca1b0e85a578b539214bda3b8d61ac23792f2e87
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Statistics::NodePtr, StaticInstPtr, ethernet PacketPtr.
base/statistics.hh:
Change NodePtr parameters to Nodeptr &.
cpu/exetrace.hh:
Change StaticInstPtr parameters to StaticInstPtr &.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ethertap.hh:
change PacketPtr parameters to PacketPtr &.
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This avoids incrementing and decrementing the MemReq
reference counters on every call and return.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
cpu/exec_context.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
Change MemReqPtr parameters to references.
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setup-spec script
util/setup-spec:
Made some changes so the information contained in the ini file explains
what the init_param value corresponds to
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message about -j).
Check for, delete, and die on zero-length .d files.
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not while printing out the data. This allows the data
to be dumped more than once.
base/cprintf.hh:
need a destructor
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special console values separately.
dev/alpha_console.cc:
use new console specific input function
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sim/universe.cc:
oops. this doesn't exist
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statStream catchall that we had before)
Also provide an optional output directory that multiple simulator output
files can be written to.
Make most output files use the output directory
base/misc.cc:
send warnings to the outputStream as well
base/trace.cc:
dprintf_stream defaults to cerr
dev/console.cc:
use the output directory for the console output if it exists
dev/etherdump.cc:
dump to the output directory if it exists
sim/builder.cc:
sim/builder.hh:
move constructor and destructor to .cc file
use a function to get the stream that the builder dumps its
output to, and create a separate file in the output directory
if able
sim/main.cc:
statStream -> outputStream
sim/serialize.cc:
dump checkpoints to the output directory if specified
sim/universe.cc:
provide an output stream for simulator output. (This takes place of the
statStream catchall that we had before)
Also provide an optional output directory that multiple simulator output
files can be written to.
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Also, compare real paths to ensure that the links point
to the right place
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