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2010-01-29ruby: Add support for generating topologies in Python.Steve Reinhardt
2010-01-29scons: ignore blank lines in .slicc filesSteve Reinhardt
2010-01-29ruby: Make SLICC-generated objects SimObjects.Steve Reinhardt
Also add SLICC support for state-machine parameter defaults (passed through to Python as SimObject Param defaults).
2010-01-29ruby: Convert most Ruby objects to M5 SimObjects.Steve Reinhardt
The necessary companion conversion of Ruby objects generated by SLICC are converted to M5 SimObjects in the following patch, so this patch alone does not compile. Conversion of Garnet network models is also handled in a separate patch; that code is temporarily disabled from compiling to allow testing of interim code.
2010-01-29ruby: get rid of obsolete, unused CustomTopology class.Steve Reinhardt
2010-01-29tests: added M5_TEST_PROGS environment variableSteve Reinhardt
to allow override of global location for regression test binaries.
2010-01-29ruby: fix out_port declarationBrad Beckmann
2010-01-29ruby: Added message type check to OutPortDeclAST.pyBrad Beckmann
Though OutPort's message type is not used to generate code, this fix checks that the programmer's intent is correct. Eventually, we may want to remove the message type from the OutPort declaration statement.
2010-01-25Automated merge with ssh://hg@m5sim.org/m5Derek Hower
2010-01-25config: changed default ruby config file for regressionDerek Hower
2010-01-23build: need to include cstdioNathan Binkert
2010-01-23style_hook: Fix the style hookNathan Binkert
Re-enable it and update it for more modern versions of mercurial.
2010-01-22Automated merge with ssh://hg@m5sim.org/m5Derek Hower
2010-01-20copyrights: add copyright info to the files I added.Lisa Hsu
checkpoint-aggregator.py was written at UM so I added a UM copyright, agg_se.py was written at AMD so I added the AMD copyright.
2010-01-19util: do checkpoint aggregation more cleanly, fix last changeset.Lisa Hsu
1) Move alpha-specific code out of page_table.cc:serialize(). 2) Begin serializing M5_pid and unserializing it, but adding an function to do optional paramIn so that old checkpoints don't need to be fixed up. 3) Fix up alpha startup code so that the unserialized M5_pid value is properly written to DTB_IPR_ASN. 4) Fix the memory unserialize that I forgot somehow in the last changeset. 5) Add in an agg_se.py to handle aggregated checkpoints. --bench foo-bar plus positional arguments foo bar are the only changes in usage from se.py. Note this aggregation stuff has only been tested for Alpha and nothing else, though it should take a very minimal amount of work to get it to work with another ISA.
2010-01-19memtest differences from Derek's changesDerek Hower
2010-01-19ruby: new atomics implementationDerek Hower
This patch changes the way that Ruby handles atomic RMW instructions. This implementation, unlike the prior one, is protocol independent. It works by locking an address from the sequencer immediately after the read portion of an RMW completes. When that address is locked, the coherence controller will only satisfy requests coming from one port (e.g., the mandatory queue) and will ignore all others. After the write portion completed, the line is unlocked. This should also work with multi-line atomics, as long as the blocks are always acquired in the same order.
2010-01-19mergeDerek Hower
2010-01-18Automated merge with ssh://hsul@localhost:4444//repo/m5Lisa Hsu
2010-01-18 util: make a generic checkpoint aggregator that can aggregate different ↵Lisa Hsu
cpts into one multi-programmed cpt. Make minor changes to serialization/unserialization to get it to work properly. Note that checkpoints were made with a comment at the beginning with // - this must be changed to ## to work properly with the python config parser in the aggregator.
2010-01-17SCons: Make --help reflect the arguments to scons.Gabe Black
The arguments were added to the global_sticky_vars Variables object after the basic help text was generated. As a result, the "actual:" value wouldn't reflect the arguments to scons and wouldn't really be the "actual" value used by the build. This change fixes that by updating global_sticky_vars slightly earlier.
2010-01-12cache: make tags->insertBlock() and tags->accessBlock() context aware so ↵Lisa Hsu
that the cache can make context-specific decisions within their various tag policy implementations.
2010-01-12since totalInstructions() is impl'ed by all the cpus, make it an abstract ↵Lisa Hsu
base class.
2010-01-12faults: i think these fault invocations should be panic and not fatal. it ↵Lisa Hsu
definitely made implementing a trace cpu easier this way.
2010-01-02MIPS: Update the stats of the RUBY version of the regressions.Gabe Black
2009-12-31MIPS: Update stats for updated initial environment.Gabe Black
2009-12-31MIPS: Beef up process initialization.Matt DeVuyst
2009-12-31MIPS: Implement the SE mode version of rdhwr.Gabe Black
2009-12-31MIPS: Fix decoding of the rdhwr instruction.Gabe Black
2009-12-31MIPS: Implement the set_thread_area system call.Gabe Black
2009-12-31MIPS: Create an artificial control register to hold the thread pointer.Gabe Black
In Linux, the set_thread_area system call stores the address of the thread local storage area into a field of the current thread_info structure. Later, to access that value, the program uses the rdhwr instruction to read a "hardware register" with index 29. The 64 bit MIPS manual, volume II, says that index 29 is reserved for a future ABI extension and should cause a "Reserved Instruction Exception". In Linux (and potentially other ISAs) that exception is trapped and emulated to return the value stored by set_thread_area as if that were actually stored by a physical register. The tp_value address (as named in the Linux kernel) is ironically stored as a control register so that it goes with a particular ThreadContext. Syscall emulation will use that to emulate storing to the OS's thread info structure, and rdhwr will emulate faulting and returning that value from software by returning the value itself, as if it was in hardware. In other words, we fake faking the register in SE mode. In an FS mode implementation it should work as specified in the manual.
2009-12-31MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg.Gabe Black
The MIPS ISA object expects to be constructed with a CPU pointer it uses to look at other thread contexts and allow them to be manipulated with control registers. Unfortunately, that differs from all the other ISA classes and would complicate their implementation. This change makes the event constructor use a CPU pointer pulled out of the thread context passed to setMiscReg instead.
2009-12-21MIPS: Add missing syscall slots.Gabe Black
These are all after the existing ones, suggesting they were added after the original list was created.
2009-12-20Alpha: Implement MVI and remaining BWX instructions.Soumyaroop Roy
2009-12-19X86: Add a latency that describes how long an interrupt takes to propagate ↵Gabe Black
through the IO APIC.
2009-12-19X86: Record the memory mode when building an X86 system.Gabe Black
2009-12-19X86: Add a common named flag for signed media operations.Gabe Black
2009-12-19X86: Create a common flag with a name to indicate high multiplies.Gabe Black
2009-12-19X86: Create a common flag with a name to indicate scalar media instructions.Gabe Black
2009-12-04ruby: cleaned up ruby-lang configurationDerek Hower
2009-11-18m5: refreshed the ruby memtest regression statsBrad Beckmann
2009-11-18Resurrection of the CMP token protocol to GEM5Brad Beckmann
2009-11-18m5: improvements to the ruby_fs.py fileBrad Beckmann
2009-11-18ruby: removed the chip pointer from MessageBufferBrad Beckmann
The Chip object no longer exists and thus is removed from the MessageBuffer constructor.
2009-11-18ruby: added error message to isinstance checkBrad Beckmann
Added error message when a symbol is not an instance of a particular expected type.
2009-11-18ruby: Added boolean to State Machine parametersBrad Beckmann
* * * ruby: Removed primitive .hh includes
2009-11-18m5: Added the default m5out directory to the hg ignore listBrad Beckmann
2009-11-18ruby: The persistent table files from GEMSBrad Beckmann
These files are need by the MOESI_CMP_token protocol.
2009-11-18ruby: MOESI hammer support for DMA reads and writesBrad Beckmann
2009-11-18ruby: Added a memory controller feature to MOESI hammerBrad Beckmann