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2006-10-09Potentially functional partially timed bandwidth limitted bus model.Gabe Black
src/mem/bus.cc: Fixes to the previous hand merging, and put the snooping back into recvTiming and out of it's own function. src/mem/bus.hh: Put snooping back into recvTiming and not in it's own function. --HG-- extra : convert_revision : fd031b7e6051a5be07ed6926454fde73b1739dc6
2006-10-08Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem_bus src/mem/bus.cc: Hand merged. Needs to be fixed --HG-- extra : convert_revision : df03219ccfd18431cc726a063bd29d30554944a1
2006-10-08Only respond if the pkt needs a response.Ron Dreslinski
Fix an issue with memory handling writebacks. src/mem/cache/base_cache.hh: src/mem/tport.cc: Only respond if the pkt needs a response. src/mem/physical.cc: Make physical memory respond to writebacks, set satisfied for invalidates/upgrades. --HG-- extra : convert_revision : 7601987a7923e54a6d1a168def4f8133d8de19fd
2006-10-08Merge zizzer:/z/m5/Bitkeeper/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : f3067efb7f3ff30158d541dfc52de4ea8edae576
2006-10-08Move away from using the statusChange function on snoops. Clean up snooping ↵Ron Dreslinski
code in general. --HG-- extra : convert_revision : 5a57bfd7742a212047fc32e8cae0dc602fdc915c
2006-10-08missing elseGabe Black
--HG-- extra : convert_revision : 8fe0e00dc3ae70b4449a78c15dd249939e644f02
2006-10-08bus changesGabe Black
src/mem/bus.cc: src/mem/bus.hh: minor fix and some formatting changes src/python/m5/objects/Bus.py: changed bits to bytes --HG-- extra : convert_revision : dcd22205604b7a2727eaf2094084c4858f3589c5
2006-10-08Replace tests of LOCKED/UNCACHEABLE flags with isLocked()/isUncacheable().Steve Reinhardt
--HG-- extra : convert_revision : f22ce3221d270ecf8631d3dcaed05753accd5461
2006-10-08Update ref stats: ll/sc, cpu_id, new kernel (?)Steve Reinhardt
--HG-- extra : convert_revision : 060cb7319c4474429917a6347a9a47f390208ec8
2006-10-08Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem_bus --HG-- extra : convert_revision : 1749397443ccb320d32f8dd23c71ed0431d30cb7
2006-10-08A possible implementation of a multiplexed bus.Gabe Black
--HG-- extra : convert_revision : 3c560eda12ffd8ca539c91024baf2770b963ede8
2006-10-08Add in HasData, and move the define of NUM_MEM_CMDS to a more visible location.Gabe Black
--HG-- extra : convert_revision : 4379efe892ca0a39363ee04009e1bbb8c8f77afa
2006-10-08Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)Steve Reinhardt
and PhysicalMemory. *No* support for caches or O3CPU. Note that properly setting cpu_id on all CPUs is now required for correct operation. src/arch/SConscript: src/base/traceflags.py: src/cpu/base.hh: src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: src/cpu/simple/timing.hh: src/mem/physical.cc: src/mem/physical.hh: src/mem/request.hh: src/python/m5/objects/BaseCPU.py: tests/configs/simple-atomic.py: tests/configs/simple-timing.py: tests/configs/tsunami-simple-atomic-dual.py: tests/configs/tsunami-simple-atomic.py: tests/configs/tsunami-simple-timing-dual.py: tests/configs/tsunami-simple-timing.py: Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing) and PhysicalMemory. *No* support for caches or O3CPU. --HG-- extra : convert_revision : 6ce982d44924cc477e049b9adf359818908e72be
2006-10-08Rename some vars for clarity.Steve Reinhardt
--HG-- extra : convert_revision : 765283ae54d2d6b5885ea44c6c1813d4bcf18488
2006-10-08Allocate new thread stacks and shared mem region via Process page tableSteve Reinhardt
for Tru64 thread library emulation. --HG-- extra : convert_revision : dbd307536e260e24ef79130d2aa88d84e33f03d4
2006-10-07Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem.head --HG-- extra : convert_revision : acab791328d16daace6dfbdc667067ddc68fb6ca
2006-10-07Update stats for change in functional path in cacheRon Dreslinski
--HG-- extra : convert_revision : 5abc964ca95b80522266c5c1bc5e661d41f2798a
2006-10-07Fix a missing pointerRon Dreslinski
--HG-- extra : convert_revision : 2056b530d48fd004ab700f09e58f44adae3ea0e9
2006-10-07No need to keep trying to request the data bus if we are already waiting.Ron Dreslinski
--HG-- extra : convert_revision : dbaad52ed8d0841dc9224661e3df0d8ef4989aa3
2006-10-07Add mechanism for caches to handle failure of the fast path on responses.Ron Dreslinski
For now, responses have priority over requests (may want to revist this). src/mem/cache/base_cache.cc: src/mem/cache/base_cache.hh: Add mechanism for caches to handle failure of the fast path on responses. --HG-- extra : convert_revision : 01524c727d1bb300cc21bdc989eb862ec8bf0b7a
2006-10-07Merge zizzer:/z/m5/Bitkeeper/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 10cdbc57c8fa1cae755e0a224bc74ea8f3782c75
2006-10-07Fix infinite writebacks bug in cache.Ron Dreslinski
src/mem/cache/cache_impl.hh: Make sure to pop the list. Fixes infinite writeback bug. src/mem/cache/miss/mshr_queue.cc: Add an assert as sanity check in case .full() stops working again. --HG-- extra : convert_revision : d847e49a397eeb0b7c5ac060fcfc3eaeac921311
2006-10-07Update refs.Kevin Lim
tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.out: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stderr: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout: Update refs. (Korey's initial push didn't use the default O3-timing config?) --HG-- extra : convert_revision : d6bc241534483114def9cf88d7815ddfc9c88fd1
2006-10-06Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem.head --HG-- extra : convert_revision : 326605820dce7641058eb0cdc0ddb2cc9602f67e
2006-10-06system.cc:Ali Saidi
Make new_page() check for an out of memory condition src/sim/system.cc: Make new_page() check for an out of memory condition --HG-- extra : convert_revision : daee82788464fca186eb24285b5f43c9fabc25b3
2006-10-06Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem_bus --HG-- extra : convert_revision : 8b5536f276527adcc27e11e790262232aeb61b13
2006-10-06Merge zizzer:/z/m5/Bitkeeper/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 2f1bbe84c92879fd1bfa579adc62a367ece1cddd
2006-10-06Another thread number removedRon Dreslinski
--HG-- extra : convert_revision : 4cfb83b8162745d686e8697f29f74f37b1a71525
2006-10-06Remove threadnum from cache everywhere for nowRon Dreslinski
Fix so that blocking for the same reason doesn't fail. I.E. multiple writebacks want to set the blocked flag. src/mem/cache/miss/blocking_buffer.cc: src/mem/cache/miss/miss_queue.cc: src/mem/cache/miss/mshr.cc: Remove threadnum from cache everywhere for now --HG-- extra : convert_revision : 7890712147655280b4f1439d486feafbd5b18b2b
2006-10-06Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemKorey Sewell
into zizzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/m5-clean --HG-- extra : convert_revision : 25200efe03b7cf9b3c546c939be74210f65a196a
2006-10-06add SMT hello world test - 2 threadsKorey Sewell
--HG-- extra : convert_revision : 54cb19d1325295895b6f0b992499bbb0216b45df
2006-10-06checkpoint recovery was screwed up because a new section was created in the ↵Lisa Hsu
middle of another section and messed up unserializing. --HG-- extra : convert_revision : 7af15fdc9e8d203b26840a2eb5fef511b6a2b21d
2006-10-06there are two main thrusts of this changeset.Lisa Hsu
1) return the periodicity of checkpoints back into the code (i.e. make m5 checkpoint n m meaningful again). 2) to do this, i had to much around with being able to repeatedly schedule and SimLoopExitEvent, which led to changes in how exit simloop events are handled to make this easier. src/arch/alpha/isa/decoder.isa: src/mem/cache/cache_impl.hh: modify arg. order for new calling convention of exitSimLoop. src/cpu/base.cc: src/sim/main.cc: src/sim/pseudo_inst.cc: src/sim/root.cc: now, instead of creating a new SimLoopExitEvent, call a wrapper schedExitSimLoop which handles all the default args. src/sim/sim_events.cc: src/sim/sim_events.hh: src/sim/sim_exit.hh: add the periodicity of checkpointing back into the code. to facilitate this, there are now two wrappers (instead of just overloading exitSimLoop). exitSimLoop is only for exiting NOW (i.e. at curTick), while schedExitSimLoop schedules and exit event for the future. --HG-- extra : convert_revision : c61f4bf05517172edd2c83368fd10bb0f0678029
2006-10-06add an option for defining a directory in which to place all your ↵Lisa Hsu
checkpoints. if none, default is cwd. --HG-- extra : convert_revision : 23a602c2d800c922346c9743cc0c583d178a0ee7
2006-10-06Merge zizzer:/bk/newmemLisa Hsu
into zizzer.eecs.umich.edu:/z/hsul/newmem --HG-- extra : convert_revision : ecf61b323a93c9192450388c8812c26b919d06cb
2006-10-06update full system references for newest disk image from linux-dist.Lisa Hsu
--HG-- extra : convert_revision : c1232dafff0d92d8041af1b9de1dc8c55ee50f40
2006-10-05Merge zizzer.eecs.umich.edu:/bk/newmemNathan Binkert
into iceaxe.:/Volumes/work/research/m5/incoming --HG-- extra : convert_revision : b4d6a36ee07d858829369027127e00a2aec097fd
2006-10-05remove traces of binningNathan Binkert
--HG-- extra : convert_revision : b33cc67cfde04c9af6f50cbef538104e1298bedc
2006-10-05Fixes for functional accesses to use the snoop path.Ron Dreslinski
And small other tweaks to snooping coherence. src/mem/cache/base_cache.hh: Make timing response at the time of send. src/mem/cache/cache.hh: src/mem/cache/cache_impl.hh: Update probe interface to be bi-directional for functional accesses src/mem/packet.hh: Add the function to create an atomic response to a given request --HG-- extra : convert_revision : 04075a117cf30a7df16e6d3ce485543cc77d4ca6
2006-10-05First pass at snooping stuff that compiles and doesn't break.Ron Dreslinski
Still need: -Handle NACK's on the recieve side -Distinguish top level caches -Handle repsonses from caches failing the fast path -Handle BusError and propogate it -Fix the invalidate packet associated with snooping in the cache src/mem/bus.cc: Make sure to snoop on functional accesses src/mem/cache/base_cache.cc: Wait to make a request into a response until it is ready to be issued src/mem/cache/base_cache.hh: Support range changes for snoops Set up snoop responses for cache->cache transfers src/mem/cache/cache_impl.hh: Only access the cache if it wasn't satisfied by cache->cache transfer Handle snoop phases (detect block, then snoop) Fix functional access to work properly (still need to fix snoop path for functional accesses) --HG-- extra : convert_revision : 4c25f11d7a996c1f56f4f7b55dde87a344e5fdf8
2006-10-05Partial reimplementation of the bus. The "clock" and "width" parameters have ↵Gabe Black
been added, and the HasData flag has been partially added to packets. --HG-- extra : convert_revision : abb2a259fcf843457abbc0bd36f9504fbe6d7d39
2006-10-05fix the argument to m5.simulate() on a checkpoint.Lisa Hsu
src/sim/stat_control.cc: add curTick to reset stats printf. --HG-- extra : convert_revision : da8cf5921e81b73f47d6831d539ca1fbdace3d1d
2006-10-05Static global object don't work well, if the variables areNathan Binkert
accessed during the construction of another static global object because there are no guarantees on ordering of construction, so stick the static global into a function as a static local and return a reference to the variable. This fixes the exit callback stuff on my Mac. --HG-- extra : convert_revision : 63a3844d0b5ee18e2011f1bc7ca7bb703284da94
2006-10-02Oops, forgot to assign the option to the param context.Kevin Lim
--HG-- extra : convert_revision : 022c3efaa3ade3fca3dfe554ececa4eeb396dc9c
2006-10-02Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem --HG-- extra : convert_revision : 1010a4ee8e1abec0e8290637feee523ca9ef9a9b
2006-10-02Be sure to set progress interval.Kevin Lim
--HG-- extra : convert_revision : 793ca7d6af1deedf6b1fb4676288b11114f583a6
2006-10-02Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem --HG-- extra : convert_revision : 9bfd96dfbd1d58d56ceaf0e266807c31cb578c34
2006-10-02Add in ability to start a trace at a specific cycle.Kevin Lim
--HG-- extra : convert_revision : 54098f3974d2a05d60e57113f7ceb46cb7a26672
2006-10-02Updates to fix merge issues and bring almost everything up to working speed. ↵Kevin Lim
Ozone CPU remains untested, but everything else compiles and runs. src/arch/alpha/isa_traits.hh: This got changed to the wrong version by accident. src/cpu/base.cc: Fix up progress event to not schedule itself if the interval is set to 0. src/cpu/base.hh: Fix up the CPU Progress Event to not print itself if it's set to 0. Also remove stats_reset_inst (something I added to m5 but isn't necessary here). src/cpu/base_dyn_inst.hh: src/cpu/checker/cpu.hh: Remove float variable of instResult; it's always held within the double part now. src/cpu/checker/cpu_impl.hh: Use thread and not cpuXC. src/cpu/o3/alpha/cpu_builder.cc: src/cpu/o3/checker_builder.cc: src/cpu/ozone/checker_builder.cc: src/cpu/ozone/cpu_builder.cc: src/python/m5/objects/BaseCPU.py: Remove stats_reset_inst. src/cpu/o3/commit_impl.hh: src/cpu/ozone/lw_back_end_impl.hh: Get TC, not XCProxy. src/cpu/o3/cpu.cc: Switch out updates from the version of m5 I have. Also remove serialize code that got added twice. src/cpu/o3/iew_impl.hh: src/cpu/o3/lsq_impl.hh: src/cpu/thread_state.hh: Remove code that was added twice. src/cpu/o3/lsq_unit.hh: Add back in stats that got lost in the merge. src/cpu/o3/lsq_unit_impl.hh: Use proper method to get flags. Also wake CPU if we're coming back from a cache miss. src/cpu/o3/thread_context_impl.hh: src/cpu/o3/thread_state.hh: Support profiling. src/cpu/ozone/cpu.hh: Update to use proper typename. src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/dyn_inst_impl.hh: Updates for newmem. src/cpu/ozone/lw_lsq_impl.hh: Get flags correctly. src/cpu/ozone/thread_state.hh: Reorder constructor initialization, use tc. src/sim/pseudo_inst.cc: Allow for loading of symbol file. Be sure to use ThreadContext and not ExecContext. --HG-- extra : convert_revision : c5657f84155807475ab4a1e20d944bb6f0d79d94
2006-10-01Move Python setup into Configure section so we can test whether theSteve Reinhardt
setup is correct and provide meeaningful error messages when it's not. Also fix for building on Cygwin where python lib is in /bin and not /lib. --HG-- extra : convert_revision : 7a29ba17463de60c72b3d8b04e4c4f81fc64bf61
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