Age | Commit message (Collapse) | Author |
|
into zamp.eecs.umich.edu:/z/ktlim2/m5
--HG--
extra : convert_revision : 936710126053a7f08b1d80b935df38f5ea837f79
|
|
determining which parameters belong to a class. This allows us to
remove the disable flag since it is not the correct model
for variable checking anyway.
objects/BaseCPU.mpy:
Use the FULL_SYSTEM environment variable to enable or disable
parameters.
sim/pyconfig/m5config.py:
remove the disable flag since it is not the correct model
for variable checking.
--HG--
extra : convert_revision : a8ccb78ba16d23006225df282a09187d32557608
|
|
otherwise m5config and the object descriptions cannot take
advantage of them.
sim/pyconfig/SConscript:
We should import m5config *after* we do the CPPDEFINES stuff,
otherwise m5config and the object descriptions cannot take
advantage of them. This means that we can't use the env dict
alias. We should instead use os.environ.
--HG--
extra : convert_revision : 392f99a3c15cfba74a5cde79a709ecfad3820e63
|
|
dev/etherlink.cc:
fix type in serialization.
--HG--
extra : convert_revision : 87f47db14b90f414fef9a0db869da4d7ef72216a
|
|
util/tracediff:
Fix to work with new parameter and output directory structure.
--HG--
extra : convert_revision : 421ed14fa02df7c9e95eb93f4d36b9ff046f1e39
|
|
into zizzer.eecs.umich.edu:/z/stever/bk/m5-head
--HG--
extra : convert_revision : daaeb6a596b08fbedd6a14833dcb3825c637d486
|
|
sim/pyconfig/m5config.py:
Don't sort child nodes, as this can change timing in memory system.
(Really ought to be fixed in memory system, but we'll just take the
sort back out for now to avoid intoducing gratuitous changes.)
--HG--
extra : convert_revision : 07e950c25911443cbc7a84435969ca596fb04348
|
|
python configuration stuff as environment variables.
sim/pyconfig/SConscript:
generate a python file that updates the env dict with all
variables in the CPPDEFINES so the python code can use those
variables in configuration scripts.
--HG--
extra : convert_revision : 50b0719b044f7adc87ce6ae1571d156ca0c5644c
|
|
and importing stuff to avoid some confusion.
sim/pyconfig/SConscript:
Split the string importer from the rest of the importer code.
The importer.py code can be embedded like m5config.py
sim/pyconfig/m5config.py:
import what we need from importer
--HG--
extra : convert_revision : 9d57f43381b55e717b5b10adfb8f0a522280ac57
|
|
file in the new CPU case.
cpu/static_inst.hh:
Hand-merge. These execute functions are within an external file in the new CPU case.
--HG--
extra : convert_revision : a34112f471fa31bdd5bb53552ddd704b9571c110
|
|
--HG--
extra : convert_revision : bfaaeebd7ec4ee8ee182909e928581f95ac2af93
|
|
old config didn't fit anymore in pools VM, this does fit.
--HG--
extra : convert_revision : b5fef2896276be675f79791b084ba97dd953d4ca
|
|
--HG--
extra : convert_revision : 77c1ec0f2425d24704a587ad2097dfaa6bab4a5c
|
|
dev/etherlink.cc:
- The EtherLink::Link object is no lonver serializable, so it is now
necessary to prepend the object's name (as determined by the parent)
to all parameters.
- Fix the serialization of the LinkDelayEvent so it actually works
- Rename some variables to make serialization simpler
dev/etherlink.hh:
- Make the EtherLink::Link object *not* derive from serializeable.
Instead, the serialize function will take a base name from
the parent EtherLink object and prepend that base name to each of
its variable names when serializing. This is similar to the
PacketData and PacketFifo classes.
- Make the EtherLink::Link object keep a pointer to its parent and its
link number so the LinkDelayEvent can be properly serialized.
- Rename some variables to make serialization simpler.
--HG--
extra : convert_revision : e5aa54cd9e07b5e033989809100e1640abfb8bed
|
|
benchmark begins properly.
configs/boot/nat-netperf-maerts-client.rcS:
Fix the echo message
configs/boot/nat-netperf-server.rcS:
Wait a second before signalling the natbox to make sure it's
had time to boot.
Fix echo message.
--HG--
extra : convert_revision : f9d32c98f24b9617ebf917790a4ca554b7b02bba
|
|
--HG--
extra : convert_revision : bee61a5026221d47fa00705ccd96595e1415f220
|
|
--HG--
extra : convert_revision : d5b97b8f5af42115989e7f9f4baa421d61a13b70
|
|
of Param structs.
objects/CoherenceProtocol.mpy:
objects/Ide.mpy:
Update for new Enum syntax.
sim/pyconfig/m5config.py:
More modest restructuring heading for auto-generating
of param structs.
- Revamped Enum handling: Enums are regular classes so they
know their names now (makes it easier for generating C++
equivalents).
- Created MetaSimObject class and moved some SimObject-specific
stuff there (i.e. does not apply to ConfigNodes in general).
--HG--
extra : convert_revision : a93b40dda3b038ebe8bffecac97e9079c22af561
|
|
util/pbs/jobfile.py:
Search for the jobfile in sys.path
--HG--
extra : convert_revision : 50d2c2c13b6b9de4f6bc4e833961e309a98b0d2b
|
|
to make it easier to diff output from modified versions.
sim/pyconfig/m5config.py:
Sort .ini outputs for repeatable results across versions.
--HG--
extra : convert_revision : fa918f2c53635eca3a02ce02af9b320eacd1f057
|
|
netcats are off - add a sleep 1 to make it actually work.
--HG--
extra : convert_revision : 3fa730a94d9270945d34061513ab9ce0ab60e7ba
|
|
that value, used CLIENT_MEMSIZE! This caused the NFS failure I was seeing.
--HG--
extra : convert_revision : 845fd7f42d7df771c59ce9a3e77667aff22967c2
|
|
even though they're not in m5config anymore.
--HG--
extra : convert_revision : 1e49d5a432790ad1c92e47f1b5e6f1b34a422fa0
|
|
1) Add fault_handler_delay param to FullCPU to wait N cycles after
committing faulting instruction before fetching fault handler.
2) Make hw_rei a serializing instruction (flushes pipe, basically).
arch/alpha/isa_desc:
Make hw_rei a serializing instruction (guarantees previous insts
complete before hw_rei will issue).
--HG--
extra : convert_revision : 704cef65b3869be9eee724055cedb22114a78359
|
|
--HG--
extra : convert_revision : 2d425ec36de0443e094640fdbbc43754bfc7ed2e
|
|
sim/pyconfig/m5config.py:
Add some comments to indicate what the decorators mean.
--HG--
extra : convert_revision : fbcbcbe4ad8cd62f2bd12af6b1f141c66752b870
|
|
base/statistics.hh:
Get rid of operator%... g++ 3.4 complains that this isn't defined
for doubles (which makes sense). We never use it anyway.
--HG--
extra : convert_revision : 3ca724e1cc42559226549835f6cd3509308e02ca
|
|
instructions use it (instead of IntALU, as before). Default config
has a single non-pipelined 3-cycle unit. A bit conservative for the
ev6 (some are 1, some are 3).
arch/alpha/isa_desc:
Make hw_mfpr and hw_mtpr use IprAccessOp op class.
cpu/full_cpu/op_class.hh:
Add IprAccess.
--HG--
extra : convert_revision : d4103da3343a586936839e29981fd15d6930d442
|
|
particular binary machine instruction and should be immutable after
they are constructed.
cpu/simple_cpu/simple_cpu.hh:
Make StaticInst parameters const.
--HG--
extra : convert_revision : e535fa10c842ce173336323f39d9108c1847f8ba
|
|
into zamp.eecs.umich.edu:/z/ktlim2/m5
--HG--
extra : convert_revision : ba556bbc93275fcd920a0529383fd480bb7218de
|
|
SConscript:
Include new files.
arch/alpha/isa_desc:
Make the eaCompPtr and memAccPtr non-const so that execute() can be called on them.
arch/alpha/isa_traits.hh:
Add enum for total number of data registers.
arch/isa_parser.py:
base/traceflags.py:
Include new light-weight OoO CPU model.
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
Changes to abstract more away from the base dyn inst class.
cpu/beta_cpu/2bit_local_pred.cc:
cpu/beta_cpu/2bit_local_pred.hh:
cpu/beta_cpu/tournament_pred.cc:
cpu/beta_cpu/tournament_pred.hh:
Remove redundant SatCounter class.
cpu/beta_cpu/alpha_dyn_inst.cc:
cpu/beta_cpu/alpha_full_cpu.cc:
cpu/beta_cpu/alpha_full_cpu.hh:
cpu/beta_cpu/bpred_unit.cc:
cpu/beta_cpu/inst_queue.cc:
cpu/beta_cpu/mem_dep_unit.cc:
cpu/beta_cpu/ras.cc:
cpu/beta_cpu/rename_map.cc:
cpu/beta_cpu/rename_map.hh:
cpu/beta_cpu/rob.cc:
Fix for gcc-3.4
cpu/beta_cpu/alpha_dyn_inst.hh:
cpu/beta_cpu/alpha_dyn_inst_impl.hh:
Fixes for gcc-3.4.
Include more variables and functions that are specific to AlphaDynInst which were once in BaseDynInst.
cpu/beta_cpu/alpha_full_cpu_builder.cc:
Make params match the current params inherited from BaseCPU.
cpu/beta_cpu/alpha_full_cpu_impl.hh:
Fixes for gcc-3.4
cpu/beta_cpu/full_cpu.cc:
Use new params pointer in BaseCPU.
Fix for gcc-3.4.
cpu/beta_cpu/full_cpu.hh:
Use new params class from BaseCPU.
cpu/beta_cpu/iew_impl.hh:
Remove unused function.
cpu/simple_cpu/simple_cpu.cc:
Remove unused global variable.
cpu/static_inst.hh:
Include OoODynInst for new lightweight OoO CPU
--HG--
extra : convert_revision : 34d9f2e64ca0313377391e0d059bf09c040286fa
|
|
into zizzer.eecs.umich.edu:/z/stever/bk/m5
--HG--
extra : convert_revision : 312d9edd677afef6c973c0cb45af4f827a2b881a
|
|
--HG--
extra : convert_revision : 59cc7c3234d1bc96919d08dc0ec7584d8aff1d6f
|
|
a faulting instruction is the fault handler, which appears as an independent
instruction to the timing model. New code will stall fetch and not fetch the
fault handler as long as there's a faulting instruction in the pipeline (i.e.,
the faulting inst has to commit first).
Also fix Ali's bad-address assertion that doesn't apply to full system.
Added some more debugging support in the process. Hopefully we'll move to the new
cpu model soon and we won't need it anymore.
arch/alpha/alpha_memory.cc:
Reorganize lookup() so we can trace the result of the lookup as well.
arch/alpha/isa_traits.hh:
Add NoopMachInst (so we can insert them in the pipeline on ifetch faults).
base/traceflags.py:
Replace "Dispatch" flag with "Pipeline" (since I added similar
DPRINTFs in other pipe stages).
cpu/exetrace.cc:
Change default for printing mis-speculated instructions to true (since
that's often what we want, and right now you can't change it from the
command line...).
--HG--
extra : convert_revision : a29a98a373076d62bbbb1d6f40ba51ecae436dbc
|
|
--HG--
extra : convert_revision : a63405fac7237014c4ef8b765d31d59d3e1bb500
|
|
--HG--
extra : convert_revision : 4c906f68c6168100f7e8f2030b1f957c88900768
|
|
--HG--
extra : convert_revision : a990503a6c01a156230d8910ad86876d09b4f1b3
|
|
file was sourced
--HG--
extra : convert_revision : 302c1d6720c0ee24fcfc266cd99f501af734a452
|
|
sim/pyconfig/m5config.py:
Fix panic
--HG--
extra : convert_revision : 56d93398e992ed6e95380f6dcdb61cbee54b3893
|
|
--HG--
extra : convert_revision : f149b8ea762d4a83ef76b3bb95f28e0709391ecf
|
|
--HG--
extra : convert_revision : 19e57e5192be3435d72652e3b36aac3b6e43d81c
|
|
in a mmaped region
--HG--
extra : convert_revision : e4ee0520c84d94a0d2e804d02035228766abe71f
|
|
--HG--
extra : convert_revision : 8f9c875541adcf685effcfb2e138f2dbb8463137
|
|
from Python object descriptions. Mostly cleanup of Python
code based on things I encountered trying to figure out
what's going on. Main reason I'm committing this now is
to transfer work from my laptop to zizzer.
sim/pyconfig/m5config.py:
Small steps toward param struct generation: all param
objects should now have a _cppname attribute that holds
their corresponding C++ type name.
Made Param ptype attribute an actual type instead of a
string. String is still stored in ptype_string.
Get rid of AddToPath() and Import() (redundant copies
are in importer, and that seems to be the more logical
place for them).
Add a few comments, delete some unused code.
test/genini.py:
A few fixes to make the environment more compatible
with what really happens when configs are executed
from the m5 binary.
--HG--
extra : convert_revision : 9fc8f72cd0c22ba3deada02f37484787342534f2
|
|
into zamp.eecs.umich.edu:/z/ktlim2/m5
--HG--
extra : convert_revision : 8a558785c64b7c33e64523d3d887ea6e760c3d2b
|
|
and JOBFILE
--HG--
extra : convert_revision : 44253a39f40efcbbcda226701b0e97d8ea46cf1e
|
|
--HG--
extra : convert_revision : 8b9bfed29b66e8bce11448f175273f5ebb6876b2
|
|
cpu/base_cpu.cc:
cpu/base_cpu.hh:
Convert the CPU stuff to use a params struct
cpu/memtest/memtest.cc:
The memory tester is really not a cpu, so don't derive from
BaseCPU since it just makes things a pain in the butt. Keep
track of max loads in the memtest class now that the base class
doesn't do it for us.
Don't have any default parameters.
cpu/memtest/memtest.hh:
The memory tester is really not a cpu, so don't derive from
BaseCPU since it just makes things a pain in the butt. Keep
track of max loads in the memtest class now that the base class
doesn't do it for us.
cpu/simple_cpu/simple_cpu.cc:
Convert to use a params struct.
remove default parameters
cpu/simple_cpu/simple_cpu.hh:
convert to use a params struct
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
this isn't really a cpu. don't derive from BaseCPU
objects/MemTest.mpy:
we only need one max_loads parameter
sim/main.cc:
Don't check for the number of CPUs since we may be doing something
else going on. If we don't have anything to simulate, the
simulator will exit anyway.
--HG--
extra : convert_revision : 2195a34a9ec90b5414324054ceb3bab643540dd5
|
|
sim/main.cc:
Include errno.h
--HG--
extra : convert_revision : ff91579ae590b3c1d11f7468b71f295e6f3edd68
|
|
it makes more sense and is less confusing.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
width is a better name than multiplier
--HG--
extra : convert_revision : ea2fa4faa160f5657aece41df469bbc9f7244b21
|