| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-04-21 | scons: Fix two problems with the way that the library path is generated. | Nathan Binkert | |
| 1) -L is automatically added, so don't do it ourselves 2) prepend the paths for gzstream and libelf so they are certain to come first. The problem is that python might add /usr/lib to the path and the user might have a locally installed version of libelf installed. | |||
| 2009-04-21 | Automated merge with ssh://m5sim.org//repo/m5 | Nathan Binkert | |
| 2009-04-21 | pseudo: only include kernel stats if FULL_SYSTEM. | Nathan Binkert | |
| 2009-04-21 | arm: include missing file for arm | Nathan Binkert | |
| 2009-04-21 | arm: Unify the ARM tlb. We forgot about this when we did the rest. | Nathan Binkert | |
| This code compiles, but there are no tests still | |||
| 2009-04-21 | rundiff: flush stdout after each diff | Steve Reinhardt | |
| 2009-04-21 | scons: make default target work again | Nathan Binkert | |
| 2009-04-21 | Set up m5threads tests on classic (non-ruby) memory system. | Steve Reinhardt | |
| Just one test (40.m5threads-test-atomic) is set up for now. These tests require that the m5threads SPARC binaries are present in /dist or in test-progs. | |||
| 2009-04-21 | syscall_emul: style fixes (mostly wrapping overly long lines) | Steve Reinhardt | |
| 2009-04-21 | syscall: Resolve conflicts between m5threads and Gabe's recent SE changes. | Steve Reinhardt | |
| 2009-04-21 | Commit m5threads package. | Daniel Sanchez | |
| This patch adds limited multithreading support in syscall-emulation mode, by using the clone system call. The clone system call works for Alpha, SPARC and x86, and multithreaded applications run correctly in Alpha and SPARC. | |||
| 2009-04-21 | SCons: Export export_vars so SConsopts files can add to them | Nathan Binkert | |
| 2009-04-21 | Minor tweaks for future Ruby compatibility. | Steve Reinhardt | |
| 2009-04-21 | request: add PREFETCH flag. | Steve Reinhardt | |
| 2009-04-20 | request: rename INST_READ to INST_FETCH. | Steve Reinhardt | |
| 2009-04-20 | request: split public and private flags into separate fields. | Steve Reinhardt | |
| This frees up needed space for more public flags. Also: - remove unused Request accessor methods - make Packet use public Request accessors, so it need not be a friend | |||
| 2009-04-19 | Mem: Fill out the comment that describes the LOCKED request flag. | Gabe Black | |
| 2009-04-19 | Mem: Change isLlsc to isLLSC. | Gabe Black | |
| 2009-04-19 | X86: Fix the functions that manipulate large bit arrays in the local APIC. | Gabe Black | |
| 2009-04-19 | X86: Fix up a copyright. | Gabe Black | |
| 2009-04-19 | X86: Fix how the TLB handles the storecheck flag. | Gabe Black | |
| 2009-04-19 | X86: Recognize and handle the lock legacy prefix. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of XADD. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of BTC. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of BTR. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of CMPXCHG. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of BTS. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of DEC. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of INC. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of NEG. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of NOT. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of XCHG. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of XOR. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of SUB. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of AND. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of SBB. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of ADC. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of OR. | Gabe Black | |
| 2009-04-19 | X86: Implement a locking version of ADD. | Gabe Black | |
| 2009-04-19 | X86: Implement the stul microop. | Gabe Black | |
| This microop does a store and unlocks the requested address. The RISC86 microop ISA doesn't seem to have an equivalent to this, so I'm guessing that the store following an ldstl is automatically unlocking. We don't do it this way for performance reasons since the behavior is the same. | |||
| 2009-04-19 | X86: Implement the ldstl microop. | Gabe Black | |
| This microop does a load, checks that a store would succeed, and locks the requested address. | |||
| 2009-04-19 | CPUs: Make the atomic CPU support locked memory accesses. | Gabe Black | |
| 2009-04-19 | Memory: Add a LOCKED flag back in for x86 style locking. | Gabe Black | |
| 2009-04-19 | Memory: Rename LOCKED for load locked store conditional to LLSC. | Gabe Black | |
| 2009-04-19 | SE mode: Make keeping track of the number of syscalls less hacky. | Gabe Black | |
| 2009-04-19 | X86: Actually put the PCI INTA entry into the MP tables. | Gabe Black | |
| 2009-04-19 | X86: Mask the PIC at startup to avoid a glitch which causes an NMI. | Gabe Black | |
| 2009-04-19 | X86: Make E820 report nice, round (and correct) numbers. | Gabe Black | |
| 2009-04-19 | X86: Actually handle 16 bit mode modrm. | Gabe Black | |
| 2009-04-19 | X86: Make the TEST instruction set all the flags it's supposed to. | Gabe Black | |
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