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2011-12-01SE: Don't warn when not extending stack as it's too noisy with O3.Ali Saidi
--HG-- extra : rebase_source : e56d1551d42d46b5f357cd63f9891715b664f6fc
2011-12-01imported patch ext/stats_updates.patchAli Saidi
--HG-- extra : rebase_source : 4697ba9eb1ca8c67fe0915fb8340d7d4ae94caba
2011-12-01O3: Remove hardcoded tgts_per_mshr in O3CPU.py.Chander Sudanthi
There are two lines in O3CPU.py that set the dcache and icache tgts_per_mshr to 20, ignoring any pre-configured value of tgts_per_mshr. This patch removes these hardcoded lines from O3CPU.py and sets the default L1 cache mshr targets to 20. --HG-- extra : rebase_source : 6f92d950e90496a3102967442814e97dc84db08b
2011-12-01Device: Make changes necessary to support a coherent page walker cache.Mitchell Hayenga
Adds the flag 'recvSnoops' which enables pagewalkers using DmaPorts, to properly configure snoops. --HG-- extra : rebase_source : 64207bef62c3268ddff2236ee4adae873812325f
2011-12-01ARM: Add support for having a TLB cache.Ali Saidi
--HG-- extra : rebase_source : 7a5780ab74d7c294682738c7ccb3ce8d56c6fd63
2011-12-01ARM: Add IsSerializeAfter and IsNonSpeculative flag to the syscall instruction .Ali Saidi
Squashes the subsequent instructions in O3 pipe after the service call, so that they see the effect of the system call when re-executed. This isn't really an issue with FS mode, but can show up in SE mode. --HG-- extra : rebase_source : 613a69fe1d9834261e25a8cd340aa6b47578e1fe
2011-12-01O3: Add stat that counts how many cycles the O3 cpu was quiesced.Ali Saidi
--HG-- extra : rebase_source : 043b9307eef3c5b87f8e6370765641e016ed1fa7
2011-12-01X86: Fix a bad segmentation check for the stack segment.Gabe Black
--HG-- extra : rebase_source : 755f4f6eae52f88ed516a1f1ac9e2565725d89c1
2011-11-30SPARC: update SE stats for FP fixAli Saidi
--HG-- extra : rebase_source : 954a009a9f8eef6cae6050ee99f264e0fb456f85
2011-11-28SPARC: Minor style fix.Gabe Black
I forgot to fix this as well per Ali's feedback. --HG-- extra : rebase_source : e70d031cb5f91e2212a1a73ea1769bf0549b826c
2011-11-28SPARC: Fixing a minor copy-paste bug using the wrong variableAndreas Hansson
There was a bug in the mm_disk implementation where a copy paste error resulted in the d32 variable not being initialised (as it incorrectly was used instead of d16), and gcc 4.5 complaining. --HG-- extra : rebase_source : 9515e87b188b9eac189da8034cb13c3bf7d9e20b
2011-11-28SPARC: Update the FS stats for the recent FP fix.Gabe Black
--HG-- extra : rebase_source : 643e3541507576e30d9cd4dec045e5b94532c342
2011-11-27SPARC: Isolate FP operations enough to prevent code/rounding mode reordering.Gabe Black
--HG-- extra : rebase_source : ee79ab89c5a707c1294f38abb84c60f8ef64196c
2011-11-27Compiler: Add an M5_NO_INLINE define.Gabe Black
--HG-- extra : rebase_source : 1f5e8b7bb6b0a8bb4f951b6d7189964d96ed5df1
2011-11-23Topology: bug fix in external link initializationTushar Krishna
--HG-- extra : rebase_source : c226cd1e5e5ed4d4c64fa9427de4905bd8335e34
2011-11-22Remove standard_1level_CMP-protocol.sm include statement from NetworkTushar Krishna
--HG-- extra : rebase_source : 51a2dd4bb643e3dc5b0218a6190cf5c1989f9691
2011-11-20X86: Fix the constant detecting three byte opcodes in the predecoder.Gabe Black
--HG-- extra : rebase_source : b64c3d2348cb73177024695fb6e205d51bf1cda9
2011-11-17Regression: Update statistics for x86 long regression testsNilay Vaish
This patch updates reference statistics for the regression tests. This update was necessitated by a recent change in behavior of some instructions in the x86 architecture.
2011-11-14Ruby: Process packet instead of RubyRequest in SequencerNilay Vaish
This patch changes the implementation of Ruby's recvTiming() function so that it pushes a packet in to the Sequencer instead of a RubyRequest. This requires changes in the Sequencer's makeRequest() and issueRequest() functions, as they also need to operate on a Packet instead of RubyRequest.
2011-11-09GCC: Guard some gcc flags so they're used when available and needed.Gabe Black
2011-11-05Tests: Update stats due to addition of fence microopNilay Vaish
2011-11-04GARNET: adding a fault model for resilient on-chip network research.Tushar Krishna
This patch adds a fault model, which provides the probability of a number of architectural faults in the interconnection network (e.g., data corruption, misrouting). These probabilities can be used to realistically inject faults in GARNET and faithfully evaluate the effectiveness of novel resilient NoC architectures.
2011-11-04MESI Protocol: Add functions for profiling missesNilay Vaish
2011-11-03x86: Add microop for fenceNilay Vaish
This patch adds a new microop for memory barrier. The microop itself does nothing, but since it is marked as a memory barrier, the O3 CPU should flush all the pending loads and stores before the fence to the memory system.
2011-11-03Protocol: Remove standard one and two level filesNilay Vaish
2011-11-03Ruby: Remove some unused typedefsNilay Vaish
This patch removes some of the unused typedefs. It also moves some of the typedefs from Global.hh to TypeDefines.hh. The patch also eliminates the file NodeID.hh.
2011-10-31GCC: Get everything working with gcc 4.6.1.Gabe Black
And by "everything" I mean all the quick regressions.
2011-10-30Commit due to merge.Nilay Vaish
2011-10-30Python: Remove import for randomNilay Vaish
2011-10-29Ruby FS: Add the options for kernel and simulation scriptNilay Vaish
These options were missing from the script ruby_fs.py. This patch adds these options to the script.
2011-10-28Merged with recent changes.Nilay Vaish
2011-10-28Ruby: Reorganize mapping of componentsNilay Vaish
In RubySlicc_ComponentMapping.hh, certain '#define's have been used for mapping MachineType to GenericMachineType. These '#define's are being eliminated and the code will now be generated by SLICC instead. Also are being eliminated some of the unused functions from RubySlicc_ComponentMapping.sm.
2011-10-22SE: move page allocation from PageTable to ProcessSteve Reinhardt
PageTable supported an allocate() call that called back through the Process to allocate memory, but did not have a method to map addresses without allocating new pages. It makes more sense for Process to do the allocation, so this method was renamed allocateMem() and moved to Process, and uses a new map() call on PageTable. The remaining uses of the process pointer in PageTable were only to get the name and the PID, so by passing these in directly in the constructor, we can make PageTable completely independent of Process.
2011-10-22syscall_emul: implement MAP_FIXED option to mmap()Steve Reinhardt
2011-10-22tests: fix spurious scons "Error 1" messagesSteve Reinhardt
Turns out these are due to diff reporting that files acutally differed via a non-zero exit code.
2011-10-20dev: clean up PioDevice and DmaDevive getPort() methods.Steve Reinhardt
Make DmaDevice::getPort() call PioDevice::getPort() instead of just copying and pasting the code. Also move definitions from .hh to .cc file.
2011-10-20SimObject: add export_method* hooks to export C++ methods to PythonSteve Reinhardt
Replace the (broken as of previous changeset) swig_objdecl() method that allowed/forced you to substitute a whole new C++ struct definition for SWIG to wrap with a set of export_method* hooks that let you just declare a set of C++ methods (or other declarations) that get inserted in the auto-generated struct. Restore the System get/setMemoryMode methods, and use this mechanism to specialize SimObject as well, eliminating teh need for sim_object.i. Needed bits of sim_object.i are moved to the new pyobject.i. Also sucked a little SimObject specialization into cxx_param_decl() allowing us to get rid of src/sim/sim_object_params.hh. Now the generation and wrapping of the base SimObject param struct is more in line with how derived objects are handled. --HG-- rename : src/python/swig/sim_object.i => src/python/swig/pyobject.i
2011-10-20scons/swig: refactor some of the scons/SWIG codeSteve Reinhardt
- Move the random bits of SWIG code generation out of src/SConscript file and into methods on the objects being wrapped. - Cleaned up some variable naming and added some comments to make the process a little clearer. - Did a little generated file/module renaming: - vptype_Foo now Foo_vector - init_Foo is now Foo_init This makes it easier to see all the Foo-related files in a sorted directory listing. - Made cxx_predecls and swig_predecls normal SimObject classmethods. - Got rid of swig_objdecls hook, even though this breaks the System objects get/setMemoryMode method exports. Will be fixing this in a future changeset.
2011-10-19ARM: Fix small bug in config script that prevents android from bootingAli Saidi
2011-10-17scons: fix building of shared objectsNathan Binkert
2011-10-10mc146818: Correctly serialize tickEventNilay Vaish
'tickEvent' was not being serialized as in its place 'event' was being used. This patch rectifies this error.
2011-09-27O3: Tidy up some DPRINTFs in the LSQ.Gabe Black
2011-09-27Faults: Replace calls to genMachineCheckFault with M5PanicFault.Gabe Black
2011-09-27Faults: Add in generic faults that work like panics, warns, etc.Gabe Black
These faults take varargs to their constructors which they print into a string and pass to the M5DebugFault base class. They are basically faults wrapped around panics, faults, warns, and warnonce-es so that they happen only at commit.
2011-09-27Faults: Make the generic faults more consistent between SE and FS.Gabe Black
All of the classes will now be available in both modes, and only GenericPageTableFault will continue to check the mode for conditional compilation. It uses a process object to handle the fault in SE mode, and for now those aren't available in FS mode.
2011-09-26ISA parser: Use '_' instead of '.' to delimit type modifiers on operands.Gabe Black
By using an underscore, the "." is still available and can unambiguously be used to refer to members of a structure if an operand is a structure, class, etc. This change mostly just replaces the appropriate "."s with "_"s, but there were also a few places where the ISA descriptions where handling the extensions themselves and had their own regular expressions to update. The regular expressions in the isa parser were updated as well. It also now looks for one of the defined type extensions specifically after connecting "_" where before it would look for any sequence of characters after a "." following an operand name and try to use it as the extension. This helps to disambiguate cases where a "_" may legitimately be part of an operand name but not separate the name from the type suffix. Because leaving the "_" and suffix on the variable name still leaves a valid C++ identifier and all extensions need to be consistent in a given context, I considered leaving them on as a breadcrumb that would show what the intended type was for that operand. Unfortunately the operands can be referred to in code templates, the Mem operand in particular, and since the exact type of Mem can be different for different uses of the same template, that broke things.
2011-09-26LSQ: Moved a couple of lines to enable O3 + RubyNilay Vaish
This patch makes O3 CPU work along with the Ruby memory model. Ruby overwrites the senderState pointer with another pointer. The pointer is restored only when Ruby gets done with the packet. LSQ makes use of senderState just after sendTiming() returns. But the dynamic_cast returns a NULL pointer since Ruby's senderState pointer is from a different class. Storing the senderState pointer before calling sendTiming() does away with the problem.
2011-09-26SE/FS: Define a const bool FullSystem which will equal FULL_SYSTEM.Gabe Black
This constant will have the same value as FULL_SYSTEM but will not be usable by the preprocessor. It can be substituted into places where FULL_SYSTEM is used in a C++ context and will make it easier to find which parts of the simulator still use FULL_SYSTEM with the preprocessor using grep.
2011-09-24SCons: Add a comment I forgot to add in earlier.Gabe Black
This comment was supposed to be added to an earlier change as part of review feedback, but I accidentally left it out when I pushed. Add it in now.
2011-09-24SCons: Make the ISA parser a source for its output files like the comments say.Gabe Black
There was a change a while ago that refactored some scons stuff which got rid of cpu_models.py but also accidentally got rid of the ISA parser as a source for its target files. That meant that changes which affected the parser wouldn't cause a rebuild unless they also changed one of the description files. This change fixes that.
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