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2006-10-18Fixed a compiler error, disassembly output, and corrected the address ↵Gabe Black
calculation. --HG-- extra : convert_revision : d34b3c0443064addb6f454ac70fbaeda0678e329
2006-10-18Fixed up ldblockf_p, implemented stdfa properly, and got rid of some old code.Gabe Black
--HG-- extra : convert_revision : 263b4b835d6d1bc9049acdc1398286277bede97a
2006-10-16Corrected the "Authors" lineGabe Black
--HG-- extra : convert_revision : 0202e130b170dcc2f45403c58cf51ec8c2e4e094
2006-10-16Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem --HG-- extra : convert_revision : 898976bbd322e55bc234035456df8090c6dcf72d
2006-10-16Fix up microcode support.Gabe Black
src/arch/sparc/isa/formats/blockmem.isa: Several small and medium bug fixes. src/cpu/simple/base.cc: Fixed a few compiler errors and made sure the next micro pc is set to 1 to prevent the first microop from executing twice. Also fixed a fetching bug. src/cpu/thread_state.cc: Made sure the microPC and nextMicroPC are initialized properly. --HG-- extra : convert_revision : a0fc8aa18d1ade916f17c557181a793c6108a8af
2006-10-16Changed how floating point register numbers are decoded to fit with the spec.Gabe Black
--HG-- extra : convert_revision : 155f48c84d06619c9c1c43375beb9d0a1c7495c9
2006-10-16Made sure the constructor for insts use ExtMachInst rather than MachInst, ↵Gabe Black
since otherwise the EXT_ASI field is lost. src/arch/sparc/isa/base.isa: src/arch/sparc/isa/formats/micro.isa: Switch MachInst to ExtMachInst so that the EXT_ASI field is available to the instructions. src/arch/sparc/utility.hh: Made sure EXT_ASI was set to the appropriate ASI value whether or not the asi register was used. --HG-- extra : convert_revision : cc4363dfe7da81969959cec9d5ad48528edeb8ce
2006-10-15Added in missing portions of the stat structure copying function.Gabe Black
--HG-- extra : convert_revision : cfabcb07b2c0c5655a757e8c98999ec3cf791e09
2006-10-15Started implementing microcode.Gabe Black
--HG-- extra : convert_revision : 51df0454085e13df023efd8a0c0a12f9756c4690
2006-10-15Added an execute function to the macro op so it can be instantiated.Gabe Black
--HG-- extra : convert_revision : 89dd46f5bbac966e6eb4f6f747419fa1d344eb87
2006-10-15Fix how additional template parameters are handled. Non string parameters ↵Gabe Black
are not processed as code. src/arch/isa_parser.py: Changed the way the extra template parameters are specified. MIPS might need to be adjusted. src/arch/sparc/isa/decoder.isa: Changed how Frd_N was set up. src/arch/sparc/isa/formats/blockmem.isa: Fixed up handling of block memory operations src/arch/sparc/isa/formats/integerop.isa: src/arch/sparc/isa/formats/mem.isa: src/arch/sparc/isa/formats/priv.isa: Fix up extra template parameters. --HG-- extra : convert_revision : ebf850d192193521bb84ca36b577051f74338d23
2006-10-14Get rid of unused CacheBlk << output operator.Steve Reinhardt
--HG-- extra : convert_revision : d5c0aadc35edf5c9495afcd3375f1f64716ef845
2006-10-13Merge 141.212.106.238:/home/gblack/m5/newmem_busGabe Black
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem_bus --HG-- extra : convert_revision : ff15f3805a9ed9aa81e92013d5b57399a30720bb
2006-10-13Fix stats for new bus modelGabe Black
--HG-- extra : convert_revision : c081754c8eb8fa5b8e7336deb3fefb545789b8ac
2006-10-13Fix assertion. I haven't tested it fully (I can't reproduce Lisa's error) ↵Kevin Lim
but I believe it should fix what she's running into (which was definitely a bug). src/cpu/o3/fetch_impl.hh: Move assertion to area where it should really always be true. Sometimes you might recvRetry and not necessarily be blocked (if there was a squash). --HG-- extra : convert_revision : 76ad35357e7f4c44fa544ffed071096a62053018
2006-10-13fix a bug in CopyStringOut. dprintk appears to work again.Ali Saidi
--HG-- extra : convert_revision : cd0d13a85ddc7599308db8604a8f63a48679cc05
2006-10-12Merge zizzer:/bk/newmemLisa Hsu
into zed.eecs.umich.edu:/z/hsul/work/m5/newmem src/cpu/simple/timing.cc: hand merge --HG-- extra : convert_revision : 083bf102249ad9bc63c447dbf85d3863f935f647
2006-10-12Changed the sign extension function from mine to the provided one. Mine ↵Gabe Black
relied on implementation specific behavior, namely right shifting a signed value. --HG-- extra : convert_revision : 4f5ef44d012de87919ad681024fe2ed0213a412f
2006-10-12Some support for handling block loads and stores and ASIs properly.Gabe Black
src/arch/sparc/isa/bitfields.isa: Added a field to retrieve the asi from the ExtMachInst src/arch/sparc/isa/decoder.isa: Fixed up how the size of memory operations where handled, and use the new EXT_ASI bit field. src/arch/sparc/isa/formats.isa: add includes for the new formats. src/arch/sparc/isa/formats/basic.isa: Add a template for BasicDecodeWithMnemonic which is needed by the unimp format. src/arch/sparc/isa/formats/mem.isa: Change around the memory format to figure out the memory access width on its own. src/arch/sparc/isa/operands.isa: Added support for the operands of block loads/stores which are offset from Frd. src/arch/sparc/utility.hh: Encoded the ASI into the ExtMachInst --HG-- extra : convert_revision : 5c6026a07e3a919e738d27f78beb0faf6b060643
2006-10-12StaticInst support for microcodeGabe Black
--HG-- extra : convert_revision : c9e062637faf2166f0d36b914f3efa7f80626663
2006-10-12The beginnings of an instruction format to deal with block loads and stores. ↵Gabe Black
This takes advantage of microcode. --HG-- extra : convert_revision : ac912df76c781f40fc462f314451148c5cdfaf43
2006-10-12Some support for macro/micro instructions in SPARC.Gabe Black
--HG-- extra : convert_revision : 1f0687d58ab3a4823911a67d8d5c66b27cc211a5
2006-10-12Support for returning unimplemented instruction in the decoder, lifted from ↵Gabe Black
Alpha --HG-- extra : convert_revision : 7e26053696b23fbc0b8cd5827a5072dcf2526e2b
2006-10-12replace functional code in tport with fixPacket().Ali Saidi
fixPacket() should be used anywhere a functional packet and timing packet are found to have the same address. --HG-- extra : convert_revision : 783ec438271b24ddb0ae742b4efd1ed7d6be93f3
2006-10-12Merge zizzer:/bk/newmemKorey Sewell
into zooks.eecs.umich.edu:/y/ksewell/research/m5-sim/cleanrepo --HG-- extra : convert_revision : f02fd56fc1ec658fe2a81d0e0b0d053b7606f7f2
2006-10-12config file updatesKorey Sewell
--HG-- extra : convert_revision : b873e0b436d71d86b87b8d9df7115bcc7ceb2b50
2006-10-12Fix CSHR retrysRon Dreslinski
--HG-- extra : convert_revision : caa7664f6c945396fa38ce62fbda018ebed4eaa6
2006-10-12Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem.head --HG-- extra : convert_revision : 0e184a0784100112db5841c587bd3dd638f8bdc0
2006-10-12small bus updates for functional accessesAli Saidi
--HG-- extra : convert_revision : c7a6b199c74ed4b4ffab14bbffb51e72d75b7742
2006-10-12Merge zizzer:/bk/newmemKorey Sewell
into zooks.eecs.umich.edu:/y/ksewell/research/m5-sim/cleanrepo --HG-- extra : convert_revision : 86abc4dabb7c72edc90fae951314d6a6b5c73705
2006-10-12Add test binary & inputsKorey Sewell
--HG-- extra : convert_revision : efc0249ae6f51b9f4f49741aafb2cad21e1fb11e
2006-10-12Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : fa5b2cfa79d87a0612b8116d407a8b2959d9095a
2006-10-12Remove bus and top level parameters from cacheRon Dreslinski
src/mem/cache/base_cache.hh: Remove top level param from cache src/mem/cache/coherence/uni_coherence.cc: Remove top level parameters from the cache --HG-- extra : convert_revision : 4437aeedc20866869de7f9ab123dfa7baeebedf0
2006-10-12Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem.head src/mem/packet.hh: hand merge --HG-- extra : convert_revision : 3f77707360235dc98c6b12a0367ca64a401313df
2006-10-12add a traceflag for functional accessesAli Saidi
implement fix packet and add the ability to print a packet to a ostream remove tabs in packet.hh (Could people stop inserting them??!?!?!) mark const functions in packet.hh as such src/base/traceflags.py: add a traceflag for functional accesses src/mem/packet.cc: implement fix packet and add the ability to print a packet to a ostream src/mem/packet.hh: add the ability to print a packet to an ostream remove tabs in file mark const functions as such --HG-- extra : convert_revision : 4297bce5e1d3abbab48be5bd9eb9e982b751fc7c
2006-10-12Check the response queue on functional accesses.Ron Dreslinski
The response queue is not tying up an MSHR, should we change that or assume infinite storage for responses? src/mem/cache/base_cache.cc: src/mem/tport.cc: Add in functional check of retry queued packets. --HG-- extra : convert_revision : 0cb40b3a96d37a5e9eec95312d660ec6a9ce526a
2006-10-12Another memleak in the memtester (need [] with the delete)Ron Dreslinski
src/cpu/memtest/memtest.cc: Another memleak in the memtester --HG-- extra : convert_revision : f7ab079e90d578fb6b9d1ff238d049fcce55b01b
2006-10-12Fix a memory leak in the memtesterRon Dreslinski
--HG-- extra : convert_revision : 93062b0f1a3ba7a5210e2f27099f20ae8f66522b
2006-10-12Fix problems with unCacheable addresses in timing-coherenceRon Dreslinski
src/base/traceflags.py: src/mem/physical.cc: Add debug falgs fro physical memory accesses src/mem/cache/cache_impl.hh: Snoops to uncacheable blocks should not happen src/mem/cache/miss/miss_queue.cc: Set the size properly on unCacheable accesses --HG-- extra : convert_revision : fc78192863afb11fc7c591fba169021b9e127d16
2006-10-12Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem --HG-- extra : convert_revision : 30b2475ba034550376455e1bc0e52e19a200fd5a
2006-10-11Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : b6224624ea493531e5ecc161bede7433f96d8a0f
2006-10-11Make default ID unique (not broadcast)Ron Dreslinski
Fix a segfault associated with DefaultId src/mem/bus.cc: Handle a segfault in the bus when DefaultPort was being used src/mem/bus.hh: Make the Default ID more unique (it overlapped with Broadcast ID) --HG-- extra : convert_revision : 9182805c5cf4d9fe004e6c5be8547a8f41ed7bfe
2006-10-11Forgot to mark myself as on the retry listRon Dreslinski
--HG-- extra : convert_revision : c20170320a284a7bf143a929e4d3aa1475a8bfe0
2006-10-11add spec2k testsKorey Sewell
--HG-- extra : convert_revision : 619d6af7013b597ade6440f8cf84d6d099e31763
2006-10-11Fix bus in FS mode.Ron Dreslinski
src/mem/bus.cc: Add debugging statement src/mem/bus.hh: Fix implementation of bus for subsequent recvTimings while handling a retry request. src/mem/tport.cc: Rework timing port to retry properly --HG-- extra : convert_revision : fbfb5e8b4a625e49c6cd764da1df46a4f336b1b2
2006-10-11add bzip test-progKorey Sewell
--HG-- extra : convert_revision : f5197172b094d59ced84423eb34c31ddf23689ee
2006-10-11System not global object, need to preface it with objects.Lisa Hsu
--HG-- extra : convert_revision : 5e105d7082a8c103fb5d5383c3093734bfd590f5
2006-10-11since memoryMode was put into the System (from SimObject), things got broken ↵Lisa Hsu
- this fixes it so that changeToTiming/changeToAtomic works. src/python/m5/SimObject.py: now that setMemoryMode is a method in System, need to convert the SimObject * _ccObject into a system ptr to call setMemoryMode. src/sim/main.cc: need this conversion now. src/sim/sim_object.hh: put the enum back into SimObject. src/sim/system.hh: memoryMode is now a part of SimObject, need the ::'s --HG-- extra : convert_revision : 0ade06957fa57b497798e1f50c237ca1badc821d
2006-10-11some drain changes in timing (kevin's) and some memory mode assertion ↵Lisa Hsu
changes so that when you come out of resume, you only assert if you're really wrong. src/cpu/simple/atomic.cc: memory mode assertion change so that it only goes off if it's supposed to. src/cpu/simple/timing.cc: some drain changes (kevin's) and some changes to memoryMode assertions so that they don't go off when they're not supposed to. --HG-- extra : convert_revision : 007d8610f097e08f01367b905ada49f93cf37ca3
2006-10-11More cache fixes. Atomic coherence now works as well.Ron Dreslinski
src/cpu/memtest/memtest.cc: src/cpu/memtest/memtest.hh: Make Memtester able to test atomic as well src/mem/bus.cc: src/mem/bus.hh: Handle atomic snoops properly for cache->cache transfers src/mem/cache/cache_impl.hh: Debug output. Clean up memleak in atomic mode. Set hitLatency. Still need to send back reasonable number for atomic return value. src/mem/packet.cc: Add command strings for new commands src/python/m5/objects/MemTest.py: Add param to test atomic memory. --HG-- extra : convert_revision : 43f880e29215776167c16ea90793ebf8122c785b
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-08 09:49:53 +0000