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src/arch/x86/isa/macroop.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.
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src/arch/x86/isa/main.isa:
Clean up where files are included.
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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extra : convert_revision : 4a2f2884a9d1125dc3156e080931ddc40defcfc7
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Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction.
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into zizzer.eecs.umich.edu:/tmp/newmem
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extra : convert_revision : e0721f59cce9cb356b53977e21bd4a7c779c217d
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Makes page table cache scheme actually work
src/mem/page_table.cc:
src/mem/page_table.hh:
fix caching scheme to actually work and improve performance
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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configs/common/FSConfig.py:
fix SPARC
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doesn't compile.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
Reworking x86's microcode system
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bit in the ExtMachInst.
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into zeep.pool:/z/saidi/work/m5.newmem
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into zeep.pool:/z/saidi/work/m5.newmem
src/cpu/simple/base.cc:
hand merge vincent/gabe/my changes to cast sizeof() to a 64bit int
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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floor
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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into zeep.pool:/z/saidi/work/m5.newmem
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
src/cpu/simple/base.cc:
Hand merge
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into zamp.eecs.umich.edu:/.automount/greenville/w/acolyte/newmem
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Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/arch/sparc/miscregfile.cc:
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
Assign traceData to be NULL at BaseSimpleCPU constructor.
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
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into zeep.pool:/z/saidi/work/m5.newmem
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src/arch/micro_asm.py:
Micro assembler
src/arch/micro_asm_test.py:
Test script for the micro assembler. This probably should go somewhere else eventually.
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extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
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src/arch/x86/isa/decoder/one_byte_opcodes.isa:
Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
Fix the immediate size table
src/arch/x86/regfile.cc:
nextnpc is bogus
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SConstruct:
export env after we've set CC/CXX
ext/libelf/SConscript:
pull in the CC/CXX variables from env. Use gm4 if it exists
ext/libelf/elf_begin.c:
ext/libelf/libelf_allocate.c:
include errno.h instead of sys/errno.h
ext/libelf/elf_common.h:
use the more standard uintX_t
ext/libelf/elf_strptr.c:
ext/libelf/elf_update.c:
include sysmacros.h on Solaris for roundup()
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Oops... forgot to update call site after changing
function argument semantics.
src/mem/tport.cc:
Oops... forgot to update call site after changing
function argument semantics.
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Make it a better base class for cache ports.
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