summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2018-10-12mips: Use little endian packet accessors.Gabe Black
We know data is little endian, so we can use those accessors explicitly. Change-Id: I6220a543686b1d45d26973391b028dc04ce85dd2 Reviewed-on: https://gem5-review.googlesource.com/c/13460 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-12alpha: Use little endian packet accessors.Gabe Black
We know data is little endian, so we can use those accessors explicitly. Change-Id: Ieb9c1eb8a4fec31ee69cbbfd8c1afdf9f64de366 Reviewed-on: https://gem5-review.googlesource.com/c/13459 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-12sparc: Use big endian packet accessors.Gabe Black
We know data is big endian, so we can use those accessors explicitly. Change-Id: I06fe35254433b20db05f5f10d0ca29a44d47c301 Reviewed-on: https://gem5-review.googlesource.com/c/13458 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-12arm: Use little endian packet accessors.Gabe Black
We know data is little endian, so we can use those accessors explicitly. Change-Id: Iee337109fcda134e1ac5a700e5141fd7060f9c45 Reviewed-on: https://gem5-review.googlesource.com/c/13457 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-12x86: Use little endian packet accessors.Gabe Black
We know data is little endian, so we can use those accessors explicitly. Change-Id: I09aa7f1e525ad1346e932ce4a772b64bf59dc350 Reviewed-on: https://gem5-review.googlesource.com/c/13456 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-12mem: Expose the raw packet accessor functions.Gabe Black
This avoids a place where data has its endianness switched so that when the endianness based accessors switch it back it returns to normal. It also makes it easier to show intent when accessing single bytes where endianness doesn't matter, and there's no contextual endianness. Change-Id: I1b97396c1b9bb39727d35112d90e3969e5fe0aab Reviewed-on: https://gem5-review.googlesource.com/c/13455 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-10-12dev: Include the platform base class even in NULL_ISA builds.Gabe Black
These classes don't have any ISA specific aspects. Change-Id: Ifefb12d23e4aee8e3fd56f0a1eb3d9ad00e733a0 Reviewed-on: https://gem5-review.googlesource.com/c/13467 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-12syscall_emul: update arm uname release to 3.7.0+Ciro Santilli
Trying to compile an ARM C hello world with arm-linux-gnueabihf-gcc from Ubuntu 16.04 leads to a runtime failure with se.py: FATAL: kernel too old because the glibc tests if the kernel is at least 3.2.0, and gem5 was reporting 3.0.0. Furthermore, it is hard to obtain such toolchain at all: for example crosstool-NG currently only allows for minimum kernels above 3.2.0. 3.7.0+ was chosen to match the aarch64 value, as it is likely that the level of support will be very similar. This commit does not guarantee that full 3.7.0 is supported, but it is not likely that we had full 3.0.0 support previously either. However, it is more likely that such support will be eventually achieved if users can at least try out their programs and implement the missing system calls as they are found. Change-Id: I8df3763ae49788a6cb11cb0920e8202cd56b0f09 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/12986 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-11mem-cache: Factor ReplaceableEntry outDaniel R. Carvalho
ReplaceableEntry is referenced by many classes that do not necessarily need access to the replacement policies. Therefore, in order to allow better compilation units, we factor it out to a new file. Change-Id: I0823567bf1ca336ffcdf783682ef473e8878d7fd Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/13418 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-10-11mem-cache: Move sector_blks to tags folderDaniel R. Carvalho
Move sector_blks.hh and sector_blks.cc to the tags folder, as its usage scope is restricted to the tags, and caches should not be aware of them. Change-Id: Ia7a71f51ec251d827872daf108c87da543a0ba57 Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/13417 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-10-11mem-cache: Rename blk.cc/hh to cache_blk.cc/hhDaniel R. Carvalho
Rename the files blk.cc and blk.hh to cache_blk.cc and cache_blk.hh to comply with the usual file-class naming rules. Change-Id: I8af45df3e4b8dd934fd9929ec914fb230cb2cb09 Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/13416 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-10-11mem-cache: Virtualize block printDaniel R. Carvalho
Encapsulate and virtualize block print, so that relevant information can be easily printed anywhere. Change-Id: I91109c29c126755183a0fd2b4446f5335e64076b Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/13415 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-10-10mem-cache: Create Tree-PLRU replacement policyDaniel R. Carvalho
Implementation of a Tree-PLRU replacement policy. It is based on the assumption that a set associative cache is used. Change-Id: I74b227e88fd6c93aab5bb2cd0e8730376db28f52 Reviewed-on: https://gem5-review.googlesource.com/c/11106 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-10-10mem-cache: Remove CacheSet.hhDaniel R. Carvalho
Replacement policies aren't aware of cache sets and do not organize blocks based on replacement data. Block search is independent of block placement. Besides, indexing policies have their own way of addressing the sets, therefore there is no need to use this class anymore. BlkType has been removed, as it wasn't being used. Change-Id: Ia79c2a491e59f295c8d60a0466c317eb0e2bdab9 Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/9782 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-10-10mem-cache: Split Tags for indexing policiesDaniel R. Carvalho
Split indexing functionality from tags, so that code duplication is reduced when adding new classes that use different indexing policies, such as set associative, skewed associative or other hash-based policies. An indexing policy defines the mapping between an address' set and its physical location. For example, a conventional set assoc cache maps an address to all ways in a set using an immutable function, that is, a set x is always mapped to set x. However, skewed assoc caches map an address to a different set for each way, using a skewing function. FALRU has been left unmodified as it is a specialization with its own complexity. Change-Id: I0838b41663f21eba0aeab7aeb7839e3703ca3324 Reviewed-on: https://gem5-review.googlesource.com/c/8885 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-10-10mem-cache: Use set and way for ReplaceableEntryDaniel R. Carvalho
Replaceable entries belong to table-like structures, and therefore they should be indexable by combining a row and a column. These, using conventional cache nomenclature translate to sets and ways. Make these entries aware of their sets and ways. The idea is to make indexing policies usable by other table-like structures. In order to do so we move sets and ways to ReplaceableEntry, which will be the common base among table entries. Change-Id: If0e3dacf9ea2f523af9cface067469ccecf82648 Reviewed-on: https://gem5-review.googlesource.com/c/12764 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-10-10mem-cache: Use possible locations to find blockDaniel R. Carvalho
Use possible locations to find block to make it placement policy independent. Change-Id: I4c9d9e1e1ff91ce12e85ca1970f927d8f4f5a93b Reviewed-on: https://gem5-review.googlesource.com/c/8884 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-10-10mem-cache: Create tags initialization functionDaniel R. Carvalho
Having the blocks initialized in the constructor makes it harder to apply inheritance in the tags classes. This patch decouples the block initialization functionality from the constructor by using an init() function. It also sets the parent cache. Change-Id: I0da7fdaae492b1177c7cc3bda8639f79921fbbeb Reviewed-on: https://gem5-review.googlesource.com/c/11509 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-10-10mem-cache: Remove Packet dependency in TagsDaniel R. Carvalho
Decouple Tags from Packets, only extracting the necessary functionality for block insertion. As a side effect, create a new function to update common insertion statistics. Change-Id: I5c58f7c17de3255beee531f72a3fd25a30d74c90 Reviewed-on: https://gem5-review.googlesource.com/c/11098 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-10-09systemc: Implement the sc_signal_rv channel and ports.Gabe Black
Change-Id: Id1a3fd2ded224bbe94a4a65e0acf34a3547aedcc Reviewed-on: https://gem5-review.googlesource.com/c/12813 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Ignore a gem5 warning about setting the stack size in verify.py.Gabe Black
This warning shouldn't make a test fail, but it's still useful to keep around. Change-Id: I9ebdbec804e11445edb82fa824ee0a6bce5943b0 Reviewed-on: https://gem5-review.googlesource.com/c/12812 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Warn if sc_stop is called more than once.Gabe Black
Change-Id: Ief88b9af0119ba4b007f79905db2522b5f95b820 Reviewed-on: https://gem5-review.googlesource.com/c/12811 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Check whether the simulation is running when creating sensitivities.Gabe Black
Change-Id: I499cde0d0eb45ba3287a8719174e1c794c1fb634 Reviewed-on: https://gem5-review.googlesource.com/c/12810 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Handle nonstandard cthread sensitivities.Gabe Black
Accellera allows some non-standard values in the second position of the SC_CTHREAD macro. Do that as well, with the same special handling which automatically selects the positive edge of boolean ports/interfaces. Change-Id: I79594980898a17afc30fea6f77384589cbc3c250 Reviewed-on: https://gem5-review.googlesource.com/c/12809 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Change how the scheduler orders processes.Gabe Black
The Accellera implementation looks like it does all the methods, then all the threads, and then loops back and tries again, and there are even comments in the code that suggests that. What it actually does, however, is runs all the methods, then runs a single thread if one is waiting, and then starts over. The effect is that the scheduler will run any methods first, then run threads until a method might have become ready, and then repeat. This will actually result in more mixing of threads and methods, more context switches, and worse performance, but it makes the regressions pass more. Change-Id: I7cb0485e26eed79204ff2a3c3ded27b973e0b7b0 Reviewed-on: https://gem5-review.googlesource.com/c/12808 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Differentiate between notifying methods and threads.Gabe Black
The Accellera implementation notifies all types of method sensitivities first, and then notifies all the ones for threads. Change-Id: I5eda75958675ba518f008852148030e032f70d83 Reviewed-on: https://gem5-review.googlesource.com/c/12807 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Rework how delayed sensitivities are handled.Gabe Black
Make BindInfo into a more general purpose Port class which mirrors sc_module and Module, sc_object and Object, etc. This tracks multiple bindings internally, and also pending sensitivities. Keep a global list of ports which are added in reverse order to match Accellera, and which is iterated over to finalize binding and for phase callbacks. This is as opposed to doing it one module at a time, and is to better match Accellera's ordering for the regressions. Also the sensitivity classes are now built with factory functions, which gets around problems calling virtual functions from their constructors or forgetting to having to have extra boilerplate each place they're constructed. The port class also now finalizes port or event finder sensitivities when its binding is completed, unless it's already complete in which case it does so immediately. Change-Id: I1b01689715c425b94e0f68cf0271f5c1565d8c61 Reviewed-on: https://gem5-review.googlesource.com/c/12806 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Refactor sensitivities.Gabe Black
Dynamic and Static sensitivities used to be represented by the same classes, even though they're (almost) disjoint in how they worked. Also timeouts, which can be used alongside dynamic sensitivities, were handled by the sensitivities themselves. That meant that the sensitivity mechanism had to mix in more types of behaviors, increasing complexity. Also, the non-standard timed_out function Accellera includes is harder to implement if the path for timeouts and regular sensitivities are mixed together. This change splits up dynamic and static sensitivities and splits out timeouts. It also immitates the ordering Accellera uses when going through sensitivities for an event. Static sensitivities are triggered first in reverse order (why?), and then dynamic sensitivities are triggered in what amounts to reverse order. To delete a sensitivity which has been handled, it's swapped with the one in the last position, and then the vector is truncated to drop it at the end. This has the net effect of stirring the dynamic sensitivities, and isn't easily immitated using a different approach, even if other approaches would be more straightforward. Double check addSensitivity for event.hh Change-Id: I1e73dce386b95f68e9d6737deb8bed70ef717e0d Reviewed-on: https://gem5-review.googlesource.com/c/12805 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Implement sc_buffer.Gabe Black
This required a small change to sc_signal so that the value change event and the change stamp for it were accessible. Change-Id: Ife0545d84f3b25e98da079786c30ffa51025cce7 Reviewed-on: https://gem5-review.googlesource.com/c/12804 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Mark a few more tests as expected to return non-zero.Gabe Black
Change-Id: Ic23865d9c22909bb7482223548dbc7a46c356920 Reviewed-on: https://gem5-review.googlesource.com/c/12623 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Add some error checks to some classes.Gabe Black
These check whether those classes are being constructed in legal circumstances, and avoids a null pointer dereference. Change-Id: Ied36ee15c3d7bf6ee444351a841c38576780298e Reviewed-on: https://gem5-review.googlesource.com/c/12622 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Add a "kind()" overload to sc_port_base.Gabe Black
This is "implementation defined" but needs to exist to match the golden reference output from Accellera. Change-Id: I9b7949343b7c62a8d568abc06ab4dfc88233b20a Reviewed-on: https://gem5-review.googlesource.com/c/12621 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Implement the sc_*_resolved classes.Gabe Black
Change-Id: Ib595da10e0f900ee4cc1847d41d29251dacb55d7 Reviewed-on: https://gem5-review.googlesource.com/c/12620 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Implement the sc_clock::time_stamp function.Gabe Black
This is just a non-standard static alias for the sc_time_stamp function. Change-Id: Ibcd0559e7dab8232528628259abb8d1bfaee16e0 Reviewed-on: https://gem5-review.googlesource.com/c/12619 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Implement sc_mutex.Gabe Black
Change-Id: I8a5bd03b46d44aeca3bba15a01a5f2180b4ed5c7 Reviewed-on: https://gem5-review.googlesource.com/c/12618 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Implement sc_semaphore.Gabe Black
Change-Id: I778d41bd81880e76caa71dc92359a00127d8f987 Reviewed-on: https://gem5-review.googlesource.com/c/12617 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Ensure SC_LONG_64 is defined and available.Gabe Black
The datatype code was checking if SC_LONG_64 was defined to determine if a long was 64 bits. The code that would define that value was dropped when porting over from the Accellera implementation, and so the wrong code was being included. This change both makes those checks look at the *value* of SC_LONG_64 to ensure that it's not missing by accident, and assigns it a value in sc_fxdefs.hh. Change-Id: Ie9bb1146452a3db1d9d99c0db575098bb06463ff Reviewed-on: https://gem5-review.googlesource.com/c/12616 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Implement SC_FORK, SC_JOIN, and SC_CJOIN.Gabe Black
SC_CJOIN is non-standard, but relied on by the Accellera tests. Change-Id: Ia4ddcb1749a07891157a58398137e94fcaa8e815 Reviewed-on: https://gem5-review.googlesource.com/c/12615 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Stop assuming picoseconds as the time resolution.Gabe Black
Also adjust some code to avoid floating point rounding problems and integer overflow issues. Change-Id: Ib4b9c4cf4af00333951db5ce07819556141aa5da Reviewed-on: https://gem5-review.googlesource.com/c/12614 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Keep all pre-init processes on a single list.Gabe Black
We were keeping track of processes which should be initialized and those which shouldn't on two different lists, and then processing each list one after the other. This could reorder processes from the order they were created, and so cause spurious differences which cause the Accellera tests to fail. This does make the scheduler slightly simpler, so it's not all bad. Change-Id: I63306a41ce7bea91fa9ff2f6774ce9150134ce48 Reviewed-on: https://gem5-review.googlesource.com/c/12613 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Track event sensitivities with a list instead of a set.Gabe Black
It's totally legal to signal that an event happened to waiting processes in any order we choose, but to match the order of events which appears in the Accellera test golden output, we need to do things in the order they did. This is less efficient, but will reduce the number of false positives. Change-Id: Ie2882249ae846991d627f5f688a9e89e629bb300 Reviewed-on: https://gem5-review.googlesource.com/c/12612 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Mostly implememt sc_simcontext.Gabe Black
Since we don't track the current process using the sc_curr_proc_handle structure, we keep one around just to return from the appropriate accessor, and set its values when it's requested. If the object is kept around, those values won't change to track changing processes. From what I see, none of the tests rely on the value tracking the process beyond the callsight. Change-Id: I1ad3b7a7b15aa0bc4d218f986ffbe7c51501b296 Reviewed-on: https://gem5-review.googlesource.com/c/12611 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Centralize module callbacks and report new warnings.Gabe Black
By centralizing module callbacks, the gem5 module class knows when different stages of the simulation are happening and can do it's own extra checks. It also compartmentalizes modules more since the kernel object doesn't have to reach into them to enumerate ports and exports. Change-Id: I55887284af9c05150fe9d054f5b6147cad6092a1 Reviewed-on: https://gem5-review.googlesource.com/c/12610 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Change how sc_clock creates processes to match the tests.Gabe Black
Accellera sets up the mechanism which toggles sc_clock differently than it's set up in gem5. This change moves things around a little to more closely match the order things are done by Accellera so that the test output matches. Change-Id: Ia6d327f4cd5d689f6969398f02a66278a3dc010c Reviewed-on: https://gem5-review.googlesource.com/c/12609 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Implement the deprecated "timed_out" function.Gabe Black
This function requires some slightly annoying bookkeeping since it doesn't just report whether the current process is running as a result of a timeout, it reports whether it's running as a result of a timeout *and* it could have been running from some other sensitivity instead. Pure timeouts don't count as timeouts which makes it harder to handle in a general way. Change-Id: I533d97fe66d20d7b83aba80f2ef45a8944668070 Reviewed-on: https://gem5-review.googlesource.com/c/12608 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Catch exceptions during updates, notifications, and callbacks.Gabe Black
Change-Id: I6005c12ce32d24413618e3955625432985f99f69 Reviewed-on: https://gem5-review.googlesource.com/c/12607 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Report an error if notifying during the update phase.Gabe Black
Change-Id: If261c7a981a247884f0a6466756966b454f197f4 Reviewed-on: https://gem5-review.googlesource.com/c/12606 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Track the scheduler status using an enum instead of bools.Gabe Black
The scheduler tracked whether it was paused or stopped with two bools which are mutually exclusive. It's useful to be able to also check for some other mutually exclusive states like what phase the scheduler is currently running. Rather than adding a bunch of additional bools, this change switches those mutually exclusive states over to an enum, and adds some methods to access and maintain that enum. Change-Id: Ia9696b2853d1b122c1100c9df0e12b018fe9b84b Reviewed-on: https://gem5-review.googlesource.com/c/12605 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Remove a redundant call to update() from the kernel object.Gabe Black
The t0Handler runs the scheduler's initPhase function which has a call to update built into it. There's no reason to call that within one of the kernel's callbacks as well. Change-Id: I02c755b7d53f93accdacf8149cc1988d7a6e214c Reviewed-on: https://gem5-review.googlesource.com/c/12604 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-10-09systemc: Mark a few tests as expected to raise an error.Gabe Black
Change-Id: I8291f5f32fb96c42f75521385cdf14c50243860f Reviewed-on: https://gem5-review.googlesource.com/c/12603 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 22:14:18 +0000