gem5 - gem5

Age	Commit message (Expand)	Author
2011-04-04	Sim: Fix Simulation.py to allow more than 1 core for standard switching.	Anthony Gutierrez
2011-04-04	ARM: Update stats for previous changes.	Ali Saidi
2011-04-04	ARM: Use CPU local lock before sending load to mem system.	Ali Saidi
2011-04-04	ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.	Ali Saidi
2011-04-04	ARM: Fix bug in MicroLdrNeon templates for initiateAcc().	Ali Saidi
2011-04-04	ARM: Cleanup and small fixes to some NEON ops to match the spec.	William Wang
2011-04-04	ARM: Cleanup implementation of ITSTATE and put important code in PCState.	Ali Saidi
2011-04-04	ARM: Fix m5op parameters bug.	Ali Saidi
2011-04-04	ARM: Tag appropriate instructions as IsReturn	Ali Saidi
2011-04-04	ARM: Fix table walk going on while ASID changes error	Ali Saidi
2011-04-04	CPU: Remove references to memory copy operations	Ali Saidi
2011-04-04	O3: Update stats for memory order violation checking patch.	Ali Saidi
2011-04-04	O3: Tighten memory order violation checking to 16 bytes.	Ali Saidi
2011-04-04	IDE: Support x86, Alpha, and ARM use of the IDE controller.	Ali Saidi
2011-04-04	ARM: Fix checkpointing case where PL111 is powered off.	Ali Saidi
2011-04-04	ARM: Remove debugging warn that was accidently left in.	Ali Saidi
2011-04-04	ARM: Fix multiplication error in udelay	Ali Saidi
2011-04-01	hammer: fixed dma uniproc error	Brad Beckmann
2011-03-31	CacheMemory: add allocateVoid() that is == allocate() but no return value.	Lisa Hsu
2011-03-31	Ruby: Simplify SLICC and Entry/TBE handling.	Lisa Hsu
2011-03-31	Ruby: Add new object called WireBuffer to mimic a Wire.	Lisa Hsu
2011-03-31	Ruby: have the rubytester pass contextId to Ruby.	Lisa Hsu
2011-03-31	Ruby: enable multiple sequencers in one controller.	Lisa Hsu
2011-03-31	Ruby: pass Packet->Req->contextId() to Ruby.	Lisa Hsu
2011-03-31	Ruby: Bug in SLICC forgot semicolon at end of code.	Lisa Hsu
2011-03-29	sim: typecast Tick to UTick for eventQ assert	Korey Sewell
2011-03-29	Power: Fix compilation.	Gabe Black
2011-03-28	This patch supports cache flushing in MOESI_hammer	Somayeh Sardashti
2011-03-28	Config: Import math in MI_example.py	Nilay Vaish
2011-03-26	tests: update reference outputs for ruby cache index change	Steve Reinhardt
2011-03-26	mips: cleanup ISA-specific code	Korey Sewell
2011-03-25	ruby: fixed cache index setting	Brad Beckmann
2011-03-25	Arm: Add in a missing miscRegName.	Gabe Black
2011-03-24	Arm: Get rid of unused and incomplete setCp15Register and readCp15Register.	Gabe Black
2011-03-24	Arm: Get rid of the unused copyStringArray32 method from Arm process classes.	Gabe Black
2011-03-24	ISA parser: Set up op_src_decl and op_dest_decl for pc operands.	Gabe Black
2011-03-22	This patch fixes a build error in networktest.cc that occurs with gcc4.2	Tushar Krishna
2011-03-22	Ruby: Remove CacheMsg class from SLICC	Nilay Vaish
2011-03-21	This patch makes garnet use the info about active and inactive vnets during a...	Tushar Krishna
2011-03-21	fix garnet fleible pipeline	Tushar Krishna
2011-03-21	This patch adds the network tester for simple and garnet networks.	Tushar Krishna
2011-03-20	SLICC: Remove WakeUp* import calls from ast/__init__.py	Nilay Vaish
2011-03-19	configs: combine ruby_se.py and se.py to avoid all that code duplication	Lisa Hsu
2011-03-19	enable x86 workloads on se.py	Lisa Hsu
2011-03-19	se.py: Modify script to make multiprogramming much easier.	Lisa Hsu
2011-03-19	util: update aggregator to handle x86 checkpoints.	Lisa Hsu
2011-03-19	Ruby: Convert CacheRequestType to RubyRequestType	Nilay Vaish
2011-03-19	Ruby: Convert AccessModeType to RubyAccessMode	Nilay Vaish
2011-03-19	MOESI_hammer: minor fixes to full-bit dir	Brad Beckmann
2011-03-19	Ruby: dma retry fix	Brad Beckmann