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2010-08-30config: minor fix to probe filter index settingBrad Beckmann
2010-08-29ruby: None, not noneNathan Binkert
2010-08-27X86: Change the copyright holder to AMD.Gabe Black
I accidentally left myself as a placeholder copyright holder on this file when I checked it in. Copyright should be assigned to AMD.
2010-08-26mem: fix m5.fast compile bug in previous csetSteve Reinhardt
2010-08-25cache: fix a bug in atomic multilevel snoopsSteve Reinhardt
2010-08-25memtest: fix/cleanup functional access testingSteve Reinhardt
Don't assert that the response packet is marked as a response since it won't always be so for functional accesses. Also cleanup code to refer to functional accesses rather than "probes" (old terminology), and mention in the DPRINTF which type of access we're doing.
2010-08-25memtest: scale associativity and mshrs according to configSteve Reinhardt
Use the actual fanouts in the tree specification to scale cache associativity and mshrs instead of dumb constants.
2010-08-25CPU: Print out traces for faluting inst when the flag ExecFaulting is setAli Saidi
2010-08-25ARM: Support unaligned memory access.Min Kyu Jeong
Without this flag set, page-crossing requests were not split into two mem request. Depending on the alignment bit in the SCTLR, misaligned access could raise a fault. However it seems unnecessary to implement that.
2010-08-25ARM: Seperate the queues of L1 and L2 walker states.Gene WU
2010-08-25ARM: Adding a bogus fault that does nothing.Min Kyu Jeong
This fault can used to flush the pipe, not including the faulting instruction. The particular case I needed this was for a self-modifying code. It needed to drain the store queue and force the following instruction to refetch from icache. DCCMVAC cp15 mcr instruction is modified to raise this fault.
2010-08-25ARM: Remove ALPHA KSeg functions.William Wang
These were erronously copied years ago into the ARM directory.
2010-08-25ARM: Limited implementation of dprintk.Ali Saidi
Does not work with vfp arguments or arguments passed on the stack.
2010-08-25ARM: Fixed register flattening logic (FP_Base_DepTag was set too low)Min Kyu Jeong
When decoding a srs instruction, invalid mode encoding returns invalid instruction. This can happen when garbage instructions are fetched from mispredicted path
2010-08-25ARM: Make VMSR, RFE PC/LR etc non speculative, and serializingAli Saidi
2010-08-25ARM: Update regression tests for ldr/str microcode changes.Ali Saidi
2010-08-25ARM: Use fewer micro-ops for register update loads if possible.Gene WU
Allow some loads that update the base register to use just two micro-ops. three micro-ops are only used if the destination register matches the offset register or the PC is the destination regsiter. If the PC is updated it needs to be the last micro-op otherwise O3 will mispredict.
2010-08-25ARM: Set the high bits in the part number so it's considered new by some code.Ali Saidi
2010-08-25ARM: Fix VFP enabled checks for mem instructionsAli Saidi
2010-08-25ARM: Seperate out the renamable bits in the FPSCR.Gabe Black
2010-08-25ARM: Eliminate some unused enums.Gabe Black
2010-08-25ARM: Fix type comparison warnings in Neon.Gabe Black
2010-08-25ARM: Implement CPACR register and return Undefined Instruction when FP ↵Gabe Black
access is disabled.
2010-08-25ARM: Implement all ARM SIMD instructions.Gabe Black
2010-08-25ARM: Expand the mode checking utility functions.Gabe Black
inUserMode now can take either a threadcontext or a CPSR value directly. If given a thread context it just extracts the CPSR and calls the other version. An inPrivelegedMode function was also implemented which just returns the opposite of inUserMode.
2010-08-25Tracing: Fix trace so 'Predicated False' doesn't show upAli Saidi
2010-08-25mem: fix dumb typo in copyrightsSteve Reinhardt
2010-08-24config: changed ruby config file names to be consistentBrad Beckmann
2010-08-24config: remove ruby's requirement on the timing cmd line paramBrad Beckmann
Since ruby only works in timing mode, explicitly requiring the timing cmd line param to be specified is not necessary.
2010-08-24config: fixed ruby dma device connectionsBrad Beckmann
2010-08-24testers: move testers to a new directoryBrad Beckmann
This patch moves the testers to a new subdirectory under src/cpu and includes the necessary fixes to work with latest m5 initialization patches. --HG-- rename : configs/example/determ_test.py => configs/example/ruby_direct_test.py rename : src/cpu/directedtest/DirectedGenerator.cc => src/cpu/testers/directedtest/DirectedGenerator.cc rename : src/cpu/directedtest/DirectedGenerator.hh => src/cpu/testers/directedtest/DirectedGenerator.hh rename : src/cpu/directedtest/InvalidateGenerator.cc => src/cpu/testers/directedtest/InvalidateGenerator.cc rename : src/cpu/directedtest/InvalidateGenerator.hh => src/cpu/testers/directedtest/InvalidateGenerator.hh rename : src/cpu/directedtest/RubyDirectedTester.cc => src/cpu/testers/directedtest/RubyDirectedTester.cc rename : src/cpu/directedtest/RubyDirectedTester.hh => src/cpu/testers/directedtest/RubyDirectedTester.hh rename : src/cpu/directedtest/RubyDirectedTester.py => src/cpu/testers/directedtest/RubyDirectedTester.py rename : src/cpu/directedtest/SConscript => src/cpu/testers/directedtest/SConscript rename : src/cpu/directedtest/SeriesRequestGenerator.cc => src/cpu/testers/directedtest/SeriesRequestGenerator.cc rename : src/cpu/directedtest/SeriesRequestGenerator.hh => src/cpu/testers/directedtest/SeriesRequestGenerator.hh rename : src/cpu/memtest/MemTest.py => src/cpu/testers/memtest/MemTest.py rename : src/cpu/memtest/SConscript => src/cpu/testers/memtest/SConscript rename : src/cpu/memtest/memtest.cc => src/cpu/testers/memtest/memtest.cc rename : src/cpu/memtest/memtest.hh => src/cpu/testers/memtest/memtest.hh rename : src/cpu/rubytest/Check.cc => src/cpu/testers/rubytest/Check.cc rename : src/cpu/rubytest/Check.hh => src/cpu/testers/rubytest/Check.hh rename : src/cpu/rubytest/CheckTable.cc => src/cpu/testers/rubytest/CheckTable.cc rename : src/cpu/rubytest/CheckTable.hh => src/cpu/testers/rubytest/CheckTable.hh rename : src/cpu/rubytest/RubyTester.cc => src/cpu/testers/rubytest/RubyTester.cc rename : src/cpu/rubytest/RubyTester.hh => src/cpu/testers/rubytest/RubyTester.hh rename : src/cpu/rubytest/RubyTester.py => src/cpu/testers/rubytest/RubyTester.py rename : src/cpu/rubytest/SConscript => src/cpu/testers/rubytest/SConscript
2010-08-24MOESI_hammer: fixed bug for dma reads in single cpu systemsBrad Beckmann
2010-08-23Faults: Get rid of some commented out code in sim/faults.hh.Gabe Black
2010-08-23X86: Create a directory for files that define register indexes.Gabe Black
This is to help tidy up arch/x86. These files should not be used external to the ISA. --HG-- rename : src/arch/x86/apicregs.hh => src/arch/x86/regs/apic.hh rename : src/arch/x86/floatregs.hh => src/arch/x86/regs/float.hh rename : src/arch/x86/intregs.hh => src/arch/x86/regs/int.hh rename : src/arch/x86/miscregs.hh => src/arch/x86/regs/misc.hh rename : src/arch/x86/segmentregs.hh => src/arch/x86/regs/segment.hh
2010-08-23Power: Get rid of unused checkFpEnableFault.Gabe Black
This function was brought in from another ISA and doesn't actually do anything or get used.
2010-08-23ISA: Get rid of old, unused utility functions cluttering up the ISAs.Gabe Black
2010-08-23X86: Get rid of the flagless microop constructor.Gabe Black
This will reduce clutter in the source and hopefully speed up compilation.
2010-08-23X86: Make the TLB fault instead of panic when something is unmapped in SE mode.Gabe Black
The fault object, if invoked, would then panic. This is a bit less direct, but it means speculative execution won't panic the simulator.
2010-08-23X86: Make the x86 ExtMachInst serializable with (UN)SERIALIZE_SCALAR.Gabe Black
--HG-- rename : src/arch/x86/types.hh => src/arch/x86/types.cc
2010-08-23X86: Define a noop ExtMachInst.Gabe Black
2010-08-23X86: Mark serializing macroops and regular instructions as such.Gabe Black
2010-08-23X86: Add a .serializing directive that makes a macroop serializing.Gabe Black
This directive really just tells the macroop to set IsSerializing and IsSerializeAfter on its final microop.
2010-08-23X86: Consolidate extra microop flags into one parameter.Gabe Black
This single parameter replaces the collection of bools that set up various flavors of microops. A flag parameter also allows other flags to be set like the serialize before/after flags, etc., without having to change the constructor.
2010-08-23CPU: Make the constants for StaticInst flags visible outside the class.Gabe Black
2010-08-23BUILD: GCC 4.4.1/2 have a bug in their auto-vectorizer that we trip onAli Saidi
2010-08-23ALPHA: The previous O3 patch causes a slight stats change with fullsys.Ali Saidi
2010-08-23O3: Skipping mem-order violation check for uncachable loads.Min Kyu Jeong
Uncachable load is not executed until it reaches the head of the ROB, hence cannot cause one.
2010-08-23ARM: Improve printing of uop disassembly.Min Kyu Jeong
2010-08-23ARM: Clean up flattening for SPSR addingMin Kyu Jeong
2010-08-23ARM: Implement DBG instruction that doesn't do much for now.Gene Wu
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