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AgeCommit message (Expand)Author
2010-06-02ARM: Decode 16 bit thumb register addressed memory instructions.Gabe Black
2010-06-02ARM: Make single stores decode to the new external store instructions.Gabe Black
2010-06-02ARM: Add a .w to the disassembly of 32 bit thumb instructions.Gabe Black
2010-06-02ARM: Make 32 bit thumb use the new, external load instructions.Gabe Black
2010-06-02ARM: Define the store instructions from outside the decoder.Gabe Black
2010-06-02ARM: Define the load instructions from outside the decoder.Gabe Black
2010-06-02ARM: Implement a new set of base classes for non macro memory instructions.Gabe Black
2010-06-02ARM: Create a "decoder" directory for the files implementing the decoder.Gabe Black
2010-06-02ARM: Flesh out the 32 bit thumb store single instructions.Gabe Black
2010-06-02ARM: Implement the 32 bit thumb load word instructions.Gabe Black
2010-06-02ARM: Add an operand for accessing the current PC.Gabe Black
2010-06-02ARM: Flesh out 32 bit thumb load word decoding.Gabe Black
2010-06-02ARM: Implement some 32 bit thumb data processing immediate instructions.Gabe Black
2010-06-02ARM: Replace the "never" condition with the "unconditional" condition.Gabe Black
2010-06-02ARM: Add a base class for 32 bit thumb data processing immediate instructions.Gabe Black
2010-06-02ARM: Add a function to decode 32 bit thumb immediate values.Gabe Black
2010-06-02ARM: Expand the decoding for 32 bit thumb data processing immediate instructi...Gabe Black
2010-06-02ARM: Stub out the 32 bit Thumb portion of the decoder.Gabe Black
2010-06-02ARM: Add bitfields for 32 bit thumb.Gabe Black
2010-06-02ARM: Decode VFP instructions.Gabe Black
2010-06-02ARM: Stub out the 16 bit thumb decoder.Gabe Black
2010-06-02ARM: Add thumb bitfields to the ExtMachInst and the isa definition.Gabe Black
2010-06-02ARM: Make the decoder handle thumb instructions separately.Gabe Black
2010-06-02ARM: Add a thumb bit bitfield.Gabe Black
2010-06-02ARM: Make the predecoder handle Thumb instructions.Gabe Black
2010-06-02ARM: Make sure ExtMachInst is used consistently instead of regular MachInst.Gabe Black
2010-06-02ARM: Add a bitfield for setting the regular, inst bits of an ExtMachInst.Gabe Black
2010-06-02ARM: Add a bit to the ExtMachInst to select thumb mode.Gabe Black
2010-06-02ARM: Allow ARM processes to start in Thumb mode.Gabe Black
2010-06-02ARM: Detect thumb mode elf images.Gabe Black
2010-06-02ARM: Add a new base class for instructions that can do an interworking branch.Gabe Black
2010-06-02ARM: Track the current ISA mode using the PC.Gabe Black
2010-06-02ARM: Fix custom writer/reader code for non indexed operands.Gabe Black
2010-06-02ARM: Remove IsControl from operands that don't imply control transfers.Gabe Black
2010-06-02ARM: Adjust some copyrightsAli Saidi
2010-06-01style: clean up ruby's Set classNathan Binkert
2010-05-25x86: put back code that I accidentally deletedNathan Binkert
2010-05-23copyright: Change HP copyright on x86 code to be more friendlyNathan Binkert
2010-05-19BPRED: Update one missing regressionAli Saidi
2010-05-14SPARC: Implement the version of movcc that uses the fp condition codes.Gabe Black
2010-05-13Automated merge with ssh://m5sim.org//repo/m5Ali Saidi
2010-05-13BPRED: Update regressions for tournament predictor fix.Ali Saidi
2010-05-13BPRED: Fixed the treshold-bug in the tournament predictor.Maximilien Breughe
2010-05-12X86: Make the cvti2f microop sign extend its integer source correctly.Gabe Black
2010-05-12X86: Actual change that fixes div. How did that happen?Gabe Black
2010-05-12X86: The logic that handled the recently fixed corner case for div wasn't qui...Gabe Black
2010-05-06Merge.Gabe Black
2010-05-06X86: Update the stats for the new aux vectors in the ruby regression.Gabe Black
2010-05-06macos: MacOS has deprecated getdirentries, so just disable the code.Nathan Binkert
2010-05-06compile: don't #include unnecessary stuffNathan Binkert