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AgeCommit message (Collapse)Author
2009-06-21ARM: Pull some static code out of the isa desc and create miscregs.hh.Gabe Black
2009-06-21ARM: Get rid of unused postacc_code.Gabe Black
2009-06-12scons: Make shared library builds work againNathan Binkert
Compile gzstream as position independent code use the PIC version of date for shared libs...oops
2009-06-10copyright: I missed some copyrights during ruby integrationNathan Binkert
2009-06-09ARM: Add a hello world regression.Gabe Black
2009-06-09ARM: Add a hello world binary.Gabe Black
2009-06-09ARM: Hook in the mmap2 system call. Make ArmLinuxProcess handle 5,6 syscall ↵Gabe Black
params.
2009-06-09ARM: Add a memory_barrier function to the "comm page".Gabe Black
This function doesn't actually provide a memory barrier (I don't think they're implemented) and instead just returns.
2009-06-09ARM: Add a cmpxchg implementation to the "comm page".Gabe Black
This implementation does what it's supposed to (I think), but it's not atomic and doesn't have memory barriers like the kernel's version.
2009-06-09ARM: Implement TLS. This is not tested.Gabe Black
2009-06-09ARM: Make ArmLinuxProcess understand "ARM private" system calls.Gabe Black
2009-06-09ARM: Update the kernel version M5 reports to 2.6.16.19Gabe Black
2009-06-05cleanup: Make use of types properly and make the loop a little more clear.Nathan Binkert
2009-06-05scons: Make it so that the processing of trace flags does not depend on orderNathan Binkert
2009-06-05types: need typename keyword to get the type.Nathan Binkert
2009-06-04types: clean up types, especially signed vs unsignedNathan Binkert
2009-06-04move: put predictor includes and cc files into the same placeNathan Binkert
--HG-- rename : src/cpu/2bit_local_pred.cc => src/cpu/pred/2bit_local.cc rename : src/cpu/o3/2bit_local_pred.hh => src/cpu/pred/2bit_local.hh rename : src/cpu/btb.cc => src/cpu/pred/btb.cc rename : src/cpu/o3/btb.hh => src/cpu/pred/btb.hh rename : src/cpu/ras.cc => src/cpu/pred/ras.cc rename : src/cpu/o3/ras.hh => src/cpu/pred/ras.hh rename : src/cpu/tournament_pred.cc => src/cpu/pred/tournament.cc rename : src/cpu/o3/tournament_pred.hh => src/cpu/pred/tournament.hh
2009-06-04style: cleanup styleNathan Binkert
2009-06-01swig: %include Event before PythonEvent so python gets the subclass correct.Nathan Binkert
Before this change, some versions of swig would cause PythonEvent to be derived from object instead of Event
2009-05-29request: add accessor and constructor for setting time other than curTickNathan Binkert
2009-05-28X86: Keep track of more descriptor state to accomodate KVM.Gabe Black
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert
2009-05-26X86: Really set up the GDT and various hidden/visible segment registers.Gabe Black
2009-05-22util: mkblankimage.sh should be executableSteve Reinhardt
2009-05-21build_opts: update ALPHA_FS cpu modelsKorey Sewell
2009-05-20igbe: Fix descriptor cache bug.Steve Reinhardt
2009-05-17includes: sort includes againNathan Binkert
2009-05-17includes: use base/types.hh not inttypes.h or stdint.hNathan Binkert
2009-05-17types: Move stuff for global types into src/base/types.hhNathan Binkert
--HG-- rename : src/sim/host.hh => src/base/types.hh
2009-05-13stats: tidy up the Distribution type a little bitNathan Binkert
2009-05-13stats: fancy is a bad nameNathan Binkert
2009-05-13stats: clean up the code for printing statsNathan Binkert
2009-05-13mips-merge: merge hello world regress for inorder cpuKorey Sewell
w/latest changes
2009-05-13inorder-regress: add hello MIPS_SEKorey Sewell
2009-05-12ruby: deal with printf warnings and convert some to cprintfNathan Binkert
2009-05-12ruby: remove random uint typedef and use unsignedNathan Binkert
2009-05-12ruby: Make ruby's Map use hashmap.hh to simplify things.Nathan Binkert
2009-05-12gcc: work around a bogus gcc errorNathan Binkert
2009-05-12slicc: work around improper initialization of a global in slicc.Nathan Binkert
2009-05-12slicc: clean up the slicc environment so things build properly on mac.Nathan Binkert
2009-05-13mips_se: add cpu_models to build optionsKorey Sewell
2009-05-13inorder-mips: Remove eaComp & memAcc; use 'visible' eaCompKorey Sewell
Inorder expects eaComp to be visible through StaticInst object. This mirrors a similar change to ALPHA... Needs to be done for SPARC and whatever other ISAs want to use InOrderCPU
2009-05-13arch-mips: add regWidth constant to float regfileKorey Sewell
2009-05-12cpus: add InOrderCPU to default buildKorey Sewell
regressions need this so they build the model
2009-05-12inorder-regress: missing regress config fileKorey Sewell
regressions need to access this file to setup the InOrderCPU object
2009-05-12alpha-isa: add mt.hh so it can compile with inorderKorey Sewell
2009-05-12inorder-regress: add vortex ALPHA_SEKorey Sewell
2009-05-12inorder-regress: add twolf ALPHA-SEKorey Sewell
2009-05-12inorder-regress: add hello worldKorey Sewell
2009-05-12inorder-resources: delete eventsKorey Sewell
make sure unrecognized events in the resource pool are deleted and also delete resource events in destructor