Age | Commit message (Expand) | Author |
2010-08-25 | ARM: Implement all ARM SIMD instructions. | Gabe Black |
2010-08-25 | ARM: Expand the mode checking utility functions. | Gabe Black |
2010-08-25 | Tracing: Fix trace so 'Predicated False' doesn't show up | Ali Saidi |
2010-08-25 | mem: fix dumb typo in copyrights | Steve Reinhardt |
2010-08-24 | config: changed ruby config file names to be consistent | Brad Beckmann |
2010-08-24 | config: remove ruby's requirement on the timing cmd line param | Brad Beckmann |
2010-08-24 | config: fixed ruby dma device connections | Brad Beckmann |
2010-08-24 | testers: move testers to a new directory | Brad Beckmann |
2010-08-24 | MOESI_hammer: fixed bug for dma reads in single cpu systems | Brad Beckmann |
2010-08-23 | Faults: Get rid of some commented out code in sim/faults.hh. | Gabe Black |
2010-08-23 | X86: Create a directory for files that define register indexes. | Gabe Black |
2010-08-23 | Power: Get rid of unused checkFpEnableFault. | Gabe Black |
2010-08-23 | ISA: Get rid of old, unused utility functions cluttering up the ISAs. | Gabe Black |
2010-08-23 | X86: Get rid of the flagless microop constructor. | Gabe Black |
2010-08-23 | X86: Make the TLB fault instead of panic when something is unmapped in SE mode. | Gabe Black |
2010-08-23 | X86: Make the x86 ExtMachInst serializable with (UN)SERIALIZE_SCALAR. | Gabe Black |
2010-08-23 | X86: Define a noop ExtMachInst. | Gabe Black |
2010-08-23 | X86: Mark serializing macroops and regular instructions as such. | Gabe Black |
2010-08-23 | X86: Add a .serializing directive that makes a macroop serializing. | Gabe Black |
2010-08-23 | X86: Consolidate extra microop flags into one parameter. | Gabe Black |
2010-08-23 | CPU: Make the constants for StaticInst flags visible outside the class. | Gabe Black |
2010-08-23 | BUILD: GCC 4.4.1/2 have a bug in their auto-vectorizer that we trip on | Ali Saidi |
2010-08-23 | ALPHA: The previous O3 patch causes a slight stats change with fullsys. | Ali Saidi |
2010-08-23 | O3: Skipping mem-order violation check for uncachable loads. | Min Kyu Jeong |
2010-08-23 | ARM: Improve printing of uop disassembly. | Min Kyu Jeong |
2010-08-23 | ARM: Clean up flattening for SPSR adding | Min Kyu Jeong |
2010-08-23 | ARM: Implement DBG instruction that doesn't do much for now. | Gene Wu |
2010-08-23 | MEM: Make CLREX a first class request operation and clear locks in caches whe... | Gene Wu |
2010-08-23 | ARM: Make sure that software prefetch instructions can't change the state of ... | Gene Wu |
2010-08-23 | ARM: Don't write tracedata on writes, it might have been freed already. | Gene Wu |
2010-08-23 | ARM: Implement CLREX init/complete acc methods | Gene Wu |
2010-08-23 | ARM: Fix Uncachable TLB requests and decoding of xn bit | Gene Wu |
2010-08-23 | Devices: Allow a device to specify that a request is uncachable. | Gene Wu |
2010-08-23 | ARM: For non-cachable accesses set the UNCACHABLE flag | Gene Wu |
2010-08-23 | ARM: Implement DSB, DMB, ISB | Gene Wu |
2010-08-23 | ARM: Get SCTLR TE bit from reset SCTLR | Gene Wu |
2010-08-23 | ARM: Implement CLREX | Gene Wu |
2010-08-23 | ARM: BX instruction can be contitional if last instruction in a IT block | Gene Wu |
2010-08-23 | CPU: Print out flatten-out register index as with IntRegs/FloatRegs traceflag | Min Kyu Jeong |
2010-08-23 | CPU: Make Exec trace to print predication result (if false) for memory instru... | Min Kyu Jeong |
2010-08-23 | ARM: mark msr/mrs instructions as SerializeBefore/After | Min Kyu Jeong |
2010-08-23 | O3: Handle loads when the destination is the PC. | Min Kyu Jeong |
2010-08-23 | ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate. | Min Kyu Jeong |
2010-08-23 | ARM: adding genMachineCheckFault() stub for ARM that doesn't panic | Min Kyu Jeong |
2010-08-23 | ARM: DFSR status value for sync external data abort is expected to be 0x8 in ... | Gene Wu |
2010-08-23 | ARM: Temporary local variables can't conflict with isa parser operands. | Gene Wu |
2010-08-23 | ARM: Exclusive accesses must be double word aligned | Ali Saidi |
2010-08-23 | ARM: Add some registers for big loads/stores to support neon. | Ali Saidi |
2010-08-23 | ARM: Decode neon memory instructions. | Ali Saidi |
2010-08-23 | ARM: Clean up the ISA desc portion of the ARM memory instructions. | Gabe Black |