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AgeCommit message (Collapse)Author
2009-10-03bus: add assertion to catch illegal retrySteve Reinhardt
on mem-inhibited transaction.
2009-10-02X86: Make successive anonymous mmaps move down in 32 bit SE mode Linux.Gabe Black
2009-10-02SE mode: Make the direction anonymous mmaps move through memory configurable.Gabe Black
2009-10-01inorder-debug: print out workloadKorey Sewell
2009-09-29commit Soumyaroop's bug catch about max_insts_all_threadsLisa Hsu
2009-09-26python: Fix m5.defines so grabbing flags works correctlyNathan Binkert
2009-09-26rundiff: Don't flush stdout until after postcontext is printed.Steve Reinhardt
2009-09-26O3: Add flag to control whether faulting instructions are traced.Steve Reinhardt
When enabled, faulting instructions appear in the trace twice (once when they fault and again when they're re-executed). This flag is set by the Exec compound flag for backwards compatibility.
2009-09-26Minor cleanup: Use the blockAlign() method where it applies in the cache.Steve Reinhardt
2009-09-26Force prefetches to check cache and MSHRs immediately prior to issue.Steve Reinhardt
This prevents redundant prefetches from being issued, solving the occasional 'needsExclusive && !blk->isWritable()' assertion failure in cache_impl.hh that several people have run into. Eliminates "prefetch_cache_check_push" flag, neither setting of which really solved the problem.
2009-09-26O3: Mark fetch stage as active if it faults.Steve Reinhardt
Otherwise if the rest of the pipeline is idle then fault will never propagate to commit to be handled, causing CPU to deadlock.
2009-09-25inorder-debug: fix cpu tick debug messageKorey Sewell
2009-09-24mips-stats: update regressions of arguments fixKorey Sewell
2009-09-23isa_parser: Turn the ISA Parser into a subclass of Grammar.Nathan Binkert
This is to prepare for future cleanup where we allow SCons to create a separate grammar class for each ISA
2009-09-23ply grammar: Fixup Tokenizer class so you can get lexer argumentsNathan Binkert
2009-09-23ruby: Disable all debug output by defaultNathan Binkert
2009-09-23arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hhNathan Binkert
2009-09-22slicc: Pure python implementation of slicc.Nathan Binkert
This is simply a translation of the C++ slicc into python with very minimal reorganization of the code. The output can be verified as nearly identical by doing a "diff -wBur". Slicc can easily be run manually by using util/slicc
2009-09-22params: small cleanup to param description internalsNathan Binkert
2009-09-22scons: add slicc and ply to sys.path and PYTHONPATH so everyone has accessNathan Binkert
2009-09-22python: Move more code into m5.util allow SCons to use that code.Nathan Binkert
Get rid of misc.py and just stick misc things in __init__.py Move utility functions out of SCons files and into m5.util Move utility type stuff from m5/__init__.py to m5/util/__init__.py Remove buildEnv from m5 and allow access only from m5.defines Rename AddToPath to addToPath while we're moving it to m5.util Rename read_command to readCommand while we're moving it Rename compare_versions to compareVersions while we're moving it. --HG-- rename : src/python/m5/convert.py => src/python/m5/util/convert.py rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py
2009-09-22multiattrdict: make multilevel nesting work properlyNathan Binkert
2009-09-22attrdict: add pickle support to attrdictNathan Binkert
2009-09-22code_formatter: use __builtin__ which is correct, not __builtins__Nathan Binkert
2009-09-17mips: fix command line argumentsKorey Sewell
arguments were not being saved correctly into M5 memory
2009-09-17inorder-mdu: multiplier latency fixKorey Sewell
mdu was workign incorrectly for 4+ latency due to incorrectly assuming multiply was finished the next stage
2009-09-17X86: Fix the expected size of the immediate offset in MOV_MI.Gabe Black
2009-09-16X86: Sign extend the immediate of wripi like the register version.Gabe Black
2009-09-16X86: Make the imm8 member of immediate microops really 8 bits consistently.Gabe Black
2009-09-16X86: Fix checking the NT bit during an IRET.Gabe Black
2009-09-16X86: Fix setting the busy bit in the task descriptor in LTR.Gabe Black
2009-09-16inorder-smt: remove hardcoded valuesSoumyaroop Roy
allows for the 2T hello world example to work in inorder model
2009-09-16inorder-configs: update se.pyKorey Sewell
fix bug with 'numThreads=len(workloads)' which was counting characters of command-line not counting threads as intended. Update numThreads for inorder/o3 cases and default to 1 for all other cases.
2009-09-16configs: add maxinsts option on command lineKorey Sewell
-option to allow threads to run to a max_inst_any_thread which is more useful/quicker in a lot of cases then always having to figure out what tick to run your simulation to.
2009-09-15Syscalls: Implement sysinfo() syscall.Vince Weaver
2009-09-15SPARC: Make resTemp in udivcc wide enough to hold all the bits we need.Vince Weaver
2009-09-15[mq]: x86syscalls.patchVince Weaver
2009-09-15inorder-alpha-fs: edit inorder model to compile FS modeKorey Sewell
2009-09-14Add an I/O cache to FS config even if there's just an "L2" cache.Steve Reinhardt
2009-09-11Added new MESI filesPolina Dudnik
2009-09-11Config adjustments for MESIPolina Dudnik
2009-09-11Somayeh's MESI protocol with Polina's bug fixesPolina Dudnik
2009-09-11MI data corruption bug fixPolina Dudnik
2009-09-11Object print bug fixPolina Dudnik
2009-09-11MOESI data corruption bug fixPolina Dudnik
2009-09-01SCons fix to always make MemTest objectPolina Dudnik
2009-08-31[mq]: MOESI_patchPolina Dudnik
2009-08-28Reset the atomics flags if RMW_Read is not followed by a RMW_Read or RMW_WritePolina Dudnik
2009-08-28imported patch mi_patchPolina Dudnik
2009-08-23Merge with head.Gabe Black