index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
Age
Commit message (
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Author
2018-03-27
dev: Remove a bunch of Alpha code from MIPS, and unnecessary TheISAs.
Gabe Black
2018-03-27
cpu: Remove ExtMachInst typedefs from the O3 CPU model.
Gabe Black
2018-03-27
arch: cpu: Make the ExtMachInst type a template argument in InstMap.
Gabe Black
2018-03-27
sparc: Add some missing M5_FALLTHROUGHs and breaks.
Gabe Black
2018-03-27
cpu: Stop extracting inst_flags from the machInst.
Gabe Black
2018-03-26
cpu: Proposed fix for backwards compatibility in proto/inst.proto.
Gabe Black
2018-03-26
scons: Re-enable override based warnings on gcc.
Gabe Black
2018-03-26
arch: Fix all override related warnings.
Gabe Black
2018-03-26
cpu: Use the new asBytes function in the protobuf inst tracer.
Gabe Black
2018-03-26
arch: Add a virtual asBytes function to the StaticInst class.
Gabe Black
2018-03-23
mem-cache: fix missing overrides in repl policies
Jason Lowe-Power
2018-03-23
ruby: Make sure addresses print in hex
Jason Lowe-Power
2018-03-23
learning_gem5: Add a simple config for MI_example
Jason Lowe-Power
2018-03-23
learning_gem5: Ruby random tester files for MSI
Jason Lowe-Power
2018-03-23
learning_gem5: Add config files for MSI protocol
Jason Lowe-Power
2018-03-23
learning_gem5: Add a simple Ruby protocol
Jason Lowe-Power
2018-03-23
mem-cache: Create FIFO replacement policy
Daniel R. Carvalho
2018-03-23
mem-cache: Fix MRU rebase
Daniel R. Carvalho
2018-03-23
arch-arm: Distinguish IS TLBI from non-IS
Giacomo Travaglini
2018-03-23
arch-arm: Created function for TLB ASID Invalidation
Giacomo Travaglini
2018-03-22
hsail: Get rid of an inert private member of StorageSpace.
Gabe Black
2018-03-22
cpu: Make the protobuf inst tracer accept variable sized instructions.
Gabe Black
2018-03-22
mem-cache: Create MRU replacement policy
Daniel R. Carvalho
2018-03-22
mem-cache: Split array indexing and replacement policies.
Daniel R. Carvalho
2018-03-21
mem-cache: Allow clean operations when block allocation fails
Nikos Nikoleris
2018-03-20
arch-arm, configs: Treat the bootloader rom as cacheable memory
Nikos Nikoleris
2018-03-20
arch, arm: Fix implicit-fallthrough GCC warnings
Chun-Chen Hsu
2018-03-20
riscv: throw IllegalInstFault when decoding invalid instructions
Tuan Ta
2018-03-15
arm: Fix implicit-fallthrough warnings when building with gcc-7+
Siddhesh Poyarekar
2018-03-15
arch-x86,sim-se: Enable prlimit syscall
Jason Lowe-Power
2018-03-15
sim-se: Fix fallthrough in prlimit
Jason Lowe-Power
2018-03-15
arch-x86,sim-se: Bump kernel version to 3.2
Jason Lowe-Power
2018-03-15
sim-se: Add /sys/devices/system/cpu/online file
Jason Lowe-Power
2018-03-15
tests: Add test program for C++ threads
Jason Lowe-Power
2018-03-15
arch-arm: Fix unused variable warning in faults.cc
Nikos Nikoleris
2018-03-15
x86: Add bitfields which can gather/scatter bases and limits.
Gabe Black
2018-03-14
x86: Simplify the implementations of RDTSC and RDTSCP slightly.
Gabe Black
2018-03-14
x86: Implement the RDTSCP instruction.
Gabe Black
2018-03-14
x86: Mark the RDTSC instruction as .serialize_before.
Gabe Black
2018-03-14
x86: Replace the .serializing directive with .serialize_(before|after).
Gabe Black
2018-03-14
arm: Fix maybe-uninitialized GCC warnings
Chun-Chen Hsu
2018-03-14
base: Fix loop range in pngwriter
Chun-Chen Hsu
2018-03-14
tests: Add missing print replacements in tests subdir
Giacomo Travaglini
2018-03-14
arch-arm: ERET from AArch64 to AArch32 ignore MSBs
Giacomo Travaglini
2018-03-13
learning_gem5: Update README for Learning gem5
Jason Lowe-Power
2018-03-12
mem-ruby: Fix RubyPrefetcher support in MESI_Two_Level
Rico Amslinger
2018-03-12
arch-arm: Adding IPA-Based Invalidating instructions
Giacomo Travaglini
2018-03-12
arch-arm: Implement missing aarch32 TLBI registers
Giacomo Travaglini
2018-03-09
tests: Python regression scripts using new print function
Giacomo Travaglini
2018-03-09
mem-cache: Use CacheBlk parameter on address regeneration
Daniel R. Carvalho
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