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extra : convert_revision : 345f91c5c16c69db22035dc716e82fd77041380f
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base/misc.cc:
Don't dump trace in panic(), SIGABRT handler will do it now.
sim/main.cc:
Add SIGABRT handler that prints curTick and dumps buffered trace (if any).
This doesn't work as well as I would like since the buffered trace records
often contain stale references to stack-resident temporary std::string objects.
Someday we'll have to put in a fix for that.
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extra : convert_revision : 67576efbf5c10e63e255fc9a9ec520326fd3567b
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--HG--
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in the store buffer.
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extra : convert_revision : c70cba4d5976b21967a53c7c728f2cbda1dfc183
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DynInst field was being set only on memory faults. If an FP
memory op encountered an FP enable fault, then the bogus memory
op would still get processed since the pipeline relied on the
inst->fault field to tell if the op was bogus.
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extra : convert_revision : 7435d712a464ce71b518425e0580aa22822fb901
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cpu/simple_cpu/simple_cpu.cc:
called basecpu serialization
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extra : convert_revision : 1a639b5e3c08e47a5d581c18b2b53fe87bd05b73
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tests
dev/ide_ctrl.cc:
Formatting
dev/ide_disk.cc:
Remove some junk, add an assert to serialize, and add missing serialize
for command register.
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extra : convert_revision : 8f99857e32f278dd4e6f23deffc8047c6411d5b2
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builds
dev/ide_ctrl.cc:
added #if to remove variables that are optimized out.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Updated serialization code
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into isabel.reinhardt.house:/z/stever/bk/m5
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extra : convert_revision : 1af377ff2dbe27f357410ab91a50b06c61f12e83
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Mostly a matter of keeping prefetches to invalid addrs
from messing up VM IPRs. Also discovered that wh64s were
not being treated as prefetches, when they really should be
(for the most part, anyway).
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
- Get rid of intrlock flag for locking VM fault regs (a la EV5);
instead, just don't update regs on VPTE loads (a la EV6).
- Add NO_FAULT MemReq flag to indicate references that should not
cause page faults (i.e., prefetches).
arch/alpha/ev5.cc:
- Get rid of intrlock flag for locking VM fault regs (a la EV5);
instead, just don't update regs on VPTE loads (a la EV6).
- Add Fault trace flag.
arch/alpha/isa_desc:
- Add NO_FAULT MemReq flag to indicate references that should not
cause page faults (i.e., prefetches).
- Mark wh64 as a "data prefetch" instruction so it gets controlled
properly by the FullCPU data prefetch control switch.
- Align wh64 EA in decoder so issue stage doesn't need to worry about it.
arch/alpha/isa_traits.hh:
- Get rid of intrlock flag for locking VM fault regs (a la EV5);
instead, just don't update regs on VPTE loads (a la EV6).
base/traceflags.py:
- Add Fault trace flag.
cpu/simple_cpu/simple_cpu.hh:
- Pass MemReq flags to writeHint() operation.
cpu/static_inst.hh:
Update comment re: prefetches.
--HG--
extra : convert_revision : 62e466b0f4c0ff9961796270fa2e371ec24bcbb6
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to use for future papers. Notable changes include a 3 level
cache hierarchy, a bug fix in the main memory bandwidth and
narrowing of the machine.
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into zizzer.eecs.umich.edu:/z/ehallnor/work/m5
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extra : convert_revision : 88c83150b7fd9260e0441334f2503b1e029d8c09
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--HG--
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dev/ide_ctrl.cc:
generalize these #defs
dev/ide_ctrl.hh:
put these in pcireg.h
dev/ns_gige.cc:
do i need io_enable? and assert will fail if i actually need to implement it, which may give clue as to wehtehr i need to implmeent the mem_enable and bm_enable stuff.
dev/ns_gige.hh:
implement this in case it's needed
dev/pcireg.h:
put these defs in pcireg instead
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extra : convert_revision : 5e3581b5da17410f943907139bd479f15d2231e8
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extra : convert_revision : cf5fd4aeaf96787345e233ddcd58f5eae55e0c27
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dev/ns_gige.cc:
fix serialization and move regsReset into the cc file
dev/ns_gige.hh:
put regsReset into cc instead of here in hh
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extra : convert_revision : 3a8796fa583e0765503104a9dbe28cc69f1a8fa9
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--HG--
extra : convert_revision : 67a36f724800b74fd0fcec9727bb2ea98ddc73e9
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busbridges. Also small fix for gcc 3.3.3.
dev/etherpkt.hh:
Gcc 3.3.3 wants assert.h to be include in this file.
dev/ide_ctrl.cc:
after unserialization we need to tell the busbridges what addresses to
respond to.
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extra : convert_revision : a421197a5be07761bdef571d0a9406d77788e270
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extra : convert_revision : da08795d48bd7b82fdfb7443e4ffa7e45c037a0c
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into lush.(none):/z/hsul/work/linux
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extra : convert_revision : 30b93e7a4548a00ba18e86aad85df4c790f51d43
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struct defs into ined_hdrs.hh
3) add some new functions to etherpkt. 4) checkin the nice ping_linux.ini that i've been using.
dev/etherpkt.hh:
remove the packet headers nate hated so much.
also add some new functionality regarding packets, like isIpHdr(), etc.
dev/ns_gige.cc:
improve the code given the nice new functions offered in etherpkt
--HG--
extra : convert_revision : 2e27f5a8dca5323c0fa22d3c51af44a35f6be1a2
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and started cleaning up config files.
arch/alpha/isa_desc:
Made implementation of cttz and ctlz more compact
base/remote_gdb.cc:
Added comment about PALcode debugger accesses
dev/baddev.cc:
dev/baddev.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
Cleaned up includes and changed device from FunctionalMemory to
PioDevice for detailed boot
dev/ns_gige.cc:
The ethernet dev uses two BARs, and the first bars size was being set
incorrectly.
dev/tsunamireg.h:
I don't know why we were using the superpage as the PCI memory addr.
Changed and works correctly with detailed boot.
--HG--
extra : convert_revision : b535e76612cb90b544305dc1aa8c5e0e774564bd
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cpu/exec_context.hh:
lift kernel_stats out in the linux tree.
--HG--
extra : convert_revision : 866c7f82d8b995b4dce295de1ab0980527d13f01
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into shizzle.(none):/home/hsul/work/m5clean
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extra : convert_revision : 97a6fbe1d48c2f8855bd1b0971130b991dd48a80
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--HG--
extra : convert_revision : 91723409e22f36622b99309a3af227ea0c382cc7
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cpu/exec_context.hh:
change this to reflect the lifted kernel stats file.
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extra : convert_revision : 0dda3babdf51ee7a57430af69c7e20322b4eb622
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Adaptec additions (will stay in BitKeeper revision history)
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extra : convert_revision : 68b4f1cc414ab67e7bd19682854ef3f0b28986c0
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--HG--
extra : convert_revision : 10205d5b7bd10a5894dde9481d0909e909760874
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the source tree for *.odesc files every time we run the script.
This is now factored out into load_odesc.py, which should be used
to generate m5odescs.py, which is then used as the source of object
& parameter definitions.
util/config/m5configbase.py:
- Move odesc loading code to separate load_odescs.py, so maybe someday
that can be done once at build time.
- Print out children of a node in the order they are added.
- Automatically assign a parent-less node to the first node for which it
is used as the value of a parameter. (Easier demonstrated than explained.)
- Calculate object paths dynamically when requested rather than trying
to keep them up to date as objects get assigned to parents.
--HG--
rename : util/config/m5config.py => util/config/m5configbase.py
extra : convert_revision : 2183a09d32f3862ab377e0a929715f30505a03cb
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--HG--
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--HG--
extra : convert_revision : 5df611ae03f41093257672c0ad46bfddc58e515c
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more, but I don't have any test handy to test it.
cpu/trace/reader/m5_reader.cc:
Add thread num.
cpu/trace/trace_cpu.cc:
Increase thread count to 4, might want to make this a parameter (but it only really costs us storage).
--HG--
extra : convert_revision : 97cd7843668a3ef85aad06e3180dc04d2ca30ac1
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accurate for a single thread FullCPU.
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extra : convert_revision : f8fe545313eb307cc6f5ff2c23894cc9870b1d5b
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extra : convert_revision : fca7af81cfa4256acc1f2fb667196ca7411d754f
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arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
arch/alpha/aout_machdep.h:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/faults.cc:
arch/alpha/faults.hh:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/osfpal.hh:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
arch/alpha/vptr.hh:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/bitfield.hh:
base/callback.hh:
base/circlebuf.cc:
base/circlebuf.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/date.cc:
base/dbl_list.hh:
base/endian.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/intmath.hh:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/misc.cc:
base/misc.hh:
base/mod_num.hh:
base/mysql.cc:
base/mysql.hh:
base/pollevent.cc:
base/pollevent.hh:
base/predictor.hh:
base/random.cc:
base/random.hh:
base/range.cc:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/socket.hh:
base/statistics.cc:
base/statistics.hh:
base/stats/events.cc:
base/stats/events.hh:
base/stats/flags.hh:
base/stats/mysql.cc:
base/stats/mysql.hh:
base/stats/mysql_run.hh:
base/stats/output.hh:
base/stats/statdb.cc:
base/stats/statdb.hh:
base/stats/text.cc:
base/stats/text.hh:
base/stats/types.hh:
base/stats/visit.cc:
base/stats/visit.hh:
base/str.cc:
base/str.hh:
base/time.cc:
base/time.hh:
base/trace.cc:
base/trace.hh:
base/userinfo.cc:
base/userinfo.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/full_cpu/op_class.hh:
cpu/full_cpu/smt.hh:
cpu/inst_seq.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/platform.cc:
dev/platform.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.hh:
dev/tsunamireg.h:
docs/stl.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/system_events.cc:
kern/system_events.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_events.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/async.hh:
sim/builder.cc:
sim/builder.hh:
sim/debug.cc:
sim/debug.hh:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/process.cc:
sim/process.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/stat_control.cc:
sim/stat_control.hh:
sim/stats.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
sim/system.cc:
sim/system.hh:
sim/universe.cc:
test/bitvectest.cc:
test/circletest.cc:
test/cprintftest.cc:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/sized_test.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/m5/m5.c:
util/m5/m5op.h:
util/tap/tap.cc:
Updated Copyright
dev/console.cc:
dev/console.hh:
This code isn't ours, and shouldn't have our copyright
--HG--
extra : convert_revision : 598f2e5eab5d5d3de2c1e862b389086e3212f7c4
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into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : 9fa64783d4f5d03acff5d11cba61e46590d6a9dd
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--HG--
extra : convert_revision : fbea7f01c528ae472845ec2897c9405afb145417
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--HG--
extra : convert_revision : 74dec35113b795e792b7fc03947a05349a4ff669
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dev/tsunami_io.cc:
Timers don't need to be rescheduled cause they aren't scheduled by
the default constructor
--HG--
extra : convert_revision : afb68e4f0c4e2a2c98f0037e061752690080a503
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into zower.eecs.umich.edu:/z/alschult/DiskModel/linux
--HG--
extra : convert_revision : b23a1d1a79ac5c593150d269d0523c474cf6a4a0
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dev/ide_ctrl.cc:
Properly serialize/unserialize the PciDev base class to get it to remap
the MMU
dev/ns_gige.cc:
dev/ns_gige.hh:
Remove the "addr" paramter from the constructor and change the device
to use PCI based MMU mappings only
dev/pciconfigall.cc:
Change comments
dev/pcidev.cc:
Properly setup the MMU after a serialize
--HG--
extra : convert_revision : 4b2e7ba58e3c24fac1ff6f80635e704d6ecc0eff
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dev/console.cc:
dev/tsunami_io.cc:
dev/tsunami_uart.cc:
fixed serialization
--HG--
extra : convert_revision : 1608a116b00007922fa382ddb0c10442a8724f8d
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dev/tsunami_pchip.cc:
SCCS merged
--HG--
extra : convert_revision : 064e3bab82aacf813d1f049d72429fd990608044
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dev/baddev.cc:
dev/baddev.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/platform.cc:
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
Updated copyright
dev/tsunamireg.h:
Updated copyright and fixed a ULL
--HG--
extra : convert_revision : 4800bd227c7064044ee98169d6a91f74c791956f
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Linux 2.6 with DMA support
dev/ide_disk.cc:
Add debug infomation for DMA transfers and fix handling of PRD pointer
values
dev/ide_disk.hh:
Reduce buffer (MAX_DMA) size to 64K
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
Add handling of PCTL register and also fix the translate from PCI to DMA
addresses which was incorrect
--HG--
extra : convert_revision : 562f55fa1c7099ad0f5a23f59dec2c8ec7601d43
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