Age | Commit message (Collapse) | Author |
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base/callback.hh:
Don't remove a callback when it is processed.
Document the callback class
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extra : convert_revision : 9d15500434fe0e5d623c624aac86976708adf0eb
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This makes testing a bit easier.
arch/alpha/alpha_memory.cc:
cpu/intr_control.cc:
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/alpha_console.cc:
dev/console.cc:
dev/disk_image.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ethertap.cc:
dev/simple_disk.cc:
kern/tru64/tru64_system.cc:
sim/main.cc:
sim/prog.cc:
Need to include builder.hh
sort #includes
sim/sim_object.cc:
sim/sim_object.hh:
Separate the SimObjectBuilder stuff into its own file
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extra : convert_revision : e8395e0cc6ae1f180f9cd6f100795a1ac44aeed5
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into crampon.eecs.umich.edu:/z/binkertn/research/m5/latest
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extra : convert_revision : 98fcdc0b893b77230ec69597930a71af227bc490
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Delete: BitKeeper/triggers/post-incoming.regression
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extra : convert_revision : 48529712a47aa7b72fe666b4cccb290a4fa4812e
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Add data to static memReq and make everything use it.
Add init of numLoads.
cpu/simple_cpu/simple_cpu.cc:
Add data to static memReq and make everything use it.
Add init of numLoads.
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extra : convert_revision : 47d98aae643c64dff4e5cf1dc770a36434122579
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Nate thought this would be cool, and I started on it, but lost interest.
I'm mostly committing this so bk stops bugging me about it. Nate, don't start
hacking on this until after the ISCA deadline!
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extra : convert_revision : e0ecc54b118ee99d254e9707b1bba11d4078d7e0
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Mostly vestiges of Dave's long-gone instruction prefetching stuff.
arch/alpha/isa_traits.hh:
Delete unused extractInstructionPrefetchTarget().
base/inifile.cc:
Delete '#if 0' code
cpu/base_cpu.hh:
Delete unused filterThisInstructionPrefetch() function.
cpu/exetrace.hh:
Delete '#if 0' code (obsolete flags).
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extra : convert_revision : c8317f56ba0a0e568daa785825ee938584987bed
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into crampon.eecs.umich.edu:/z/binkertn/research/m5/latest
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extra : convert_revision : a07675b26bc39cf082e2f4486998718417d43946
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stale reference to machine.def).
arch/alpha/isa_desc:
Add comment describing store-conditional result code
cpu/exec_context.hh:
update comments
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extra : convert_revision : ac59e0ad7a9440cb6656617fdf05495b59c68f55
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extra : convert_revision : 78cffd79fe441c37a7a3f5a2a4b99349a835e4bf
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into zizzer.eecs.umich.edu:/y/ehallnor/work/m5
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extra : convert_revision : 1d562a8a3c17335399aede18464aabcaaa81ca6c
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Doxyfile:
Remove directories from root exclude list that are covered in the pattern list.
Doxyfile:
Change default Alpha index columns to 3 since it looks better in the browser.
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extra : convert_revision : 2d5733bf01e9abf201c0c058f69fbcd57e12ad3b
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regenerate a decoder.cc from the isa_desc
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extra : convert_revision : 31d3200208a6e2e079a367c151e7f8bf223b1990
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top-level release dir) before shipping it.
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extra : convert_revision : 3013379ec6dc95217f35aeef9df2e4ac0a33b69f
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Doxyfile:
Make doxygen ignore BitKeeper files
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extra : convert_revision : 3e277037958675682b1ba674bd57df94af4d6373
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base/statistics.hh:
Document the friend class because doxygen can't handle the template instantiation.
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64_events.cc:
Change namespace from Tru64 to tru64 (There is a class Tru64, and it was confusing doxygen).
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extra : convert_revision : 9644b1324814952cb6a2d98fd2ab4d07f0860b45
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into zizzer.eecs.umich.edu:/y/ehallnor/work/m5
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extra : convert_revision : 2979dcbf516446b45c7fb94454e4c4f013f480e4
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Two new parameters for the CPU models, max_loads_any_thread and max_loads_all_threads.
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
Swap out maxReads for the new commited loads model.
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extra : convert_revision : 35031329bbc476122b2203104537a9f8b46addfa
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Changed the default to not use dot to speed testing of documentation for warnings.
We probably don't want to release postint and postext since there is
information about absolute file locations in them.
Doxyfile:
Turn of DOT for local testing.
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extra : convert_revision : 04df481c7a238e7745e90a011e43f8c533888567
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extra : convert_revision : 0262799031839bc27f08e207e6a6dfcc97c50ac5
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arch/alpha/aout_machdep.h:
Comment aout_exechdr fields to make doxygen happy.
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extra : convert_revision : 23fe88cb7ee511ccd83d2779024daf015133c9ce
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dirname in this repo too
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extra : convert_revision : c099dbd2e247d327cce6c2cfa744fea0a6cf9b3d
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added log info
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extra : convert_revision : a8c2c75d59c3cadb03597bc1923099ff650ab298
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finally, the right one. so simple, yet path so heinous.
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extra : convert_revision : 7eeece20d36bed9d868771dc0eaf865eeee8dda3
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just complains too much.
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extra : convert_revision : cf7eaf89f5a0b65d7ed54b697cb3f2a65742358e
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extra : convert_revision : da6710c255ff4e4c46048f09bc2106f9ef8f0311
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extra : convert_revision : 8c250f65b1a56b732c328e5f7599e269def2241b
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extra : convert_revision : e7662de4cac06bd95d33fc1ba47fd2b6ab4ef864
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into zizzer.eecs.umich.edu:/y/ehallnor/work/m5
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extra : convert_revision : 98e87516378744d70eae8536344d0484a0fc9042
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to specify it.
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extra : convert_revision : c18a008a4b00465e9764f0ba07d4d0d8209f3305
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use the correct operator
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extra : convert_revision : 1ed4e5c0ea56db1e39e43b700b8d250ecff8a596
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removed blank line
docs/footer.html:
removed blank line
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extra : convert_revision : 6bccc4e3b5c01e2ccffd69e2127df651512d4670
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lost an i, hehe, in cut and paste
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extra : convert_revision : 4826b74b20802f4e8a946b2fe320b7f947b0dd7d
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added blank space
docs/footer.html:
added blank space
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extra : convert_revision : 7366ca4d4ce27498b629bb697c674d8ede82c750
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new file
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extra : convert_revision : 19052541e73693dc090f588d8283bf8560ad5563
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extra : convert_revision : 1c2faba65e1112f0972bae330cbde4a563429b73
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extra : convert_revision : c680884d3e758fab5ce3a258ec277f1a22f87ea1
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extra : convert_revision : 5bc15c55eddd58336625997817f583e0d43225c6
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extra : convert_revision : 32f2018fbe761121a848f0a7a980523514fc7710
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Mainly removing whitespace at the end of lines.
This will reduce future diffs/conflicts.
Also adding a space after if, while, and for
This was all accomplished with:
#!/usr/bin/perl -pi~
s/[ ]+$//; # there is a space and a tab in the brackets
s/if\(/if (/g;
s/for\(/for (/g;
s/while\(/while (/g;
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/fake_syscall.cc:
arch/alpha/isa_traits.hh:
arch/alpha/vtophys.cc:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/dbl_list.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inifile.cc:
base/intmath.cc:
base/intmath.hh:
base/misc.cc:
base/mod_num.hh:
base/pollevent.cc:
base/random.cc:
base/random.hh:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/coff_sym.h:
base/loader/coff_symconst.h:
base/loader/ecoff_object.cc:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/socket.cc:
base/statistics.cc:
base/statistics.hh:
base/str.cc:
base/str.hh:
base/trace.cc:
base/trace.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/intr_control.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/static_inst.hh:
cpu/full_cpu/op_class.hh:
cpu/full_cpu/smt.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherint.cc:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/pcireg.h:
docs/stl.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/printf.cc:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/debug.cc:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/prog.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_object.cc:
sim/sim_time.cc:
sim/sim_time.hh:
sim/system.cc:
test/bitvectest.cc:
test/circletest.cc:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/sized_test.cc:
test/stattest.cc:
test/symtest.cc:
util/tap/tap.cc:
util/term/term.c:
formatting fixes
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extra : convert_revision : 01e6dbc9615c5d0e923502b8410a416c0434cdf6
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better. This changes how the setup script works, but
you don't need to re-run setup.
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extra : convert_revision : 764d7440561d0ee73f554d45a4ef8533fd35734b
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into zans.eecs.umich.edu:/z/binkertn/research/m5/latest
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extra : convert_revision : d5ba96b559be93774e82692099675b6d1f525221
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base/intmath.hh:
Don't return -1 in FloorLog2. That's wierd. Assert instead.
If you care about this, you should check for zero yourself.
Create seprate versions for uint32_t, uint64_t, int32_t, and
int64_t. signed vs unsigned so that error checking can be done
correctly. 32 vs 64 for speed.
Finally, fix a little bug in CeilLog2 that will make it return
the correct result for 1.
kern/tru64/tru64_events.cc:
fix #includes
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extra : convert_revision : c47915fc417fdc194a5561949a5366ffb266e693
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into zizzer.eecs.umich.edu:/y/sraasch/m5
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extra : convert_revision : 022364d1e5bf2f3b004ba75164580c1a821b16a5
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base/statistics.hh:
Put a commented-out #define for STAT_DEBUG
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extra : convert_revision : 7c2decc9dac7c3c9d867461d2e0f1970f3ca0733
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cpu/pc_event.cc:
SCCS merged
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extra : convert_revision : f7046f2bf6053be9b00150390fabe3d4f82b0981
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test change that is real is SIM:cycle is now gone.
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extra : convert_revision : 7b5c25c35c11eb44e10e9c49324a93c8ed3e12bb
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into zizzer.eecs.umich.edu:/y/ehallnor/work/m5
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extra : convert_revision : 25b46c6ff1be6ea339dcaccce2f2987e4ea0f484
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Trial fix, uint64_T > long
base/hostinfo.cc:
Trial fix, uint64_T > long
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extra : convert_revision : cc039420980f1bf29074a20ccea3b9a3afe99f22
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extra : convert_revision : fa5537304bd5e574807df5954f166ce884bb45d5
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