Age | Commit message (Collapse) | Author |
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make sure the interrupt controller is on cpu die
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memory system bug
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util/stats/stats.py:
tweak the graphing stuff for the new configurations we have.
add more graph types.
nsgige -> etherdev
deal with memory hierarchy change by using L2 instead of L3
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configs/boot/nfs-server.rcS:
made the partition size correct
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configs/boot/nfs-client.rcS:
lucky #3
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are replaced by sim/stats.hh and sim/stat_control.*)
dev/ns_gige.cc:
dev/sinic.cc:
Include sim/stats.hh instead of sim/sim_stats.hh
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class. While we're at it, very minor formatting.
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do a nameOut. This fixes a subtle bug in serialization that
can pop up.
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const references are ok, or pass by value.
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doesn't have its own interrupt functions
dev/ide_ctrl.hh:
oops. we don't have our own interrupt functions anymore
we get them from the base class.
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latencies.
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to add new devices. Abstract the Platform more so that
it is unnecessary to know know platform specifics for
interrupting or translating PCI DMA addresses.
dev/ide_ctrl.cc:
convert to parameter struct for initialization
use the interrupt functions in the PciDev base class
convert from tsunami to using platform
We don't need an interrupt controller here.
dev/ide_ctrl.hh:
don't use Tsunami, use Platform
make the IdeDisk a friend so that it can access my plaform
convert to parameter struct for construction
dev/ide_disk.cc:
don't use tsunami references, but platform references
dev/ns_gige.cc:
Convert to parameter struct for initialzation. Use code in
base class for interrupts so we don't need to know anything
about the platform. Don't need an IntrControl *.
dev/ns_gige.hh:
We don't need a Tsunami * anymore
convert to a parameter struct for construction
dev/pcidev.cc:
deal with new parameter struct
dev/pcidev.hh:
- Move all of the configuration parameters into a param struct
that we can pass into the constructor.
- Add a Platform * for accessing new generic interrupt post/clear
and dma address translation fuctions
- Create functions for posting/clearing interrupts and translating
dma addresses
dev/platform.cc:
have default functions that panic on pci calls
dev/platform.hh:
don't make the pci stuff pure virtual, but rather provide
default implementations that panic. Also, add dma address
translation.
dev/tsunami.cc:
this-> isn't necessary here.
add pci address translation
dev/tsunami.hh:
implement the pciToDma address translation
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don't need to include ev5.hh anymore
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all macros in ev5.hh to inline functions or constant typed
variables and make them follow our style while we're at it.
All of the stuff in this file actually belongs in the ISA
traits code, but this is a first step at getting things done
in the right manner.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/ev5.cc:
arch/alpha/isa_desc:
dev/ns_gige.cc:
kern/tru64/tru64_events.cc:
deal with changes in ev5.hh
arch/alpha/ev5.hh:
Macros are nasty, so let's get rid of them. Convert all
all macros to inline functions or constant typed variables.
Make them follow our style while we're at it.
All of the stuff in this file actually belongs in the ISA
traits code, but this is a first step at getting things done
in the right manner.
arch/alpha/isa_traits.hh:
move some of the ev5 specific code into the isa
arch/alpha/vtophys.cc:
base/remote_gdb.cc:
deal with isa addition
cpu/exec_context.hh:
be less isa specific and use the isa traits to figure out
what we can.
dev/alpha_console.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
deal with changes in ev5.hh
I don't believe this masking is actually necessary. We should
look at removing it later.
dev/ide_ctrl.cc:
sort #includes
deal with changes in ev5.hh
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it's not used.
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there were 3 different ways!!! i like ali's.
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rename : configs/boot/client.netperf.maerts => configs/boot/netperf-maerts-client.rcS
rename : configs/boot/client.netperf.rr => configs/boot/netperf-rr.rcS
rename : configs/boot/server.netperf => configs/boot/netperf-server.rcS
rename : configs/boot/client.netperf.stream => configs/boot/netperf-stream-client.rcS
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Add "fast write" behavior on writeInvalidates.
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into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest
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checkInterrupts variable and use that to determine whether an interrupt
can occur on a given cycle.
arch/alpha/ev5.cc:
XC -> CPU (and xc -> CPU) since we're really talking about a CPU here
Don't use the global check_interrupts variable. Add a per-cpu
checkInterrupts variable and use that to determine whether an interrupt
can occur on a given cycle.
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deferral
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cpu/trace/opt_cpu.cc:
cpu/trace/trace_cpu.cc:
we don't want to register this cpu since it's not a real cpu
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the registration stuff all moves into BaseCPU
cpu/base_cpu.cc:
Move the registration stuff into the BaseCPU since all
other CPUs use it.
cpu/base_cpu.hh:
Move the defer registration stuff into the BaseCPU since all
other CPUs use it.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
registration stuff moved to base class
sim/system.cc:
the activation of exec contexts should happen at startup, not
when they are registered.
sim/system.hh:
the system now has a startup function
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SConscript:
arch/isa_parser.py:
cpu/static_inst.hh:
Add inorderCPU
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through the following phases.
1) Construct all param contexts
2) Call the checkParams() on each context
3) Build the configuration hierarchy
4) Construct all SimObjects
5) Initialize all SimObjects by calling init() on each one
6) Unserialize the checkpoint
7) Register all statisitcs
8) Check validity of all statistics (after that, no new stats)
9) Reset all stats.
10) Call SimStartup() which calls startup() on all SimObjects,
ParamContexts, and any other object deriving from StartupCallback
SConscript:
no more SimInit() we have SimStartup() now
sim/param.hh:
Make all params have a startup callback.
sim/sim_events.cc:
the init callbacks no longer exist. We can simplify code by
using startup().
sim/sim_object.hh:
Make all SimObjects derive from StartupCallback
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SConscript:
these files don't exist
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sim/main.cc:
Get rid of default.ini processing... it's kind of a pain and nobody uses it.
util/tracediff:
Add comments on usage.
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specific
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arch/alpha/isa_traits.hh:
Move defines to non full system code section so they can
be used elsewhere
cpu/simple_cpu/simple_cpu.cc:
Don't use magic numbers
cpu/simple_cpu/simple_cpu.hh:
simple format nit
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into zizzer.eecs.umich.edu:/z/stever/bk/m5
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into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest
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base/refcnt.hh:
reorganize the RefCountingPtr a little bit to make it easier
to derive from
dev/etherpkt.hh:
this doesn't belong here. use the inet.hh stuff
dev/ns_gige.cc:
dev/ns_gige.hh:
use newer features in the tcp/ip/ethernet stuff
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