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AgeCommit message (Expand)Author
2014-11-23config: ruby: Get rid of an "eval" and an "exec" operating on generated code.Gabe Black
2014-11-21x86: Update stats for the new Linux delay port.Gabe Black
2014-11-21x86: pc: Put a stub IO device at port 0xed which the kernel can use for delays.Gabe Black
2014-11-18configs: small fix to ruby portion of fs.py and se.pyNilay Vaish
2014-11-18dev: Use fixed size member variables to describe fixed size PL111 registers.Gabe Black
2014-11-17vnc: Add a conversion function for bgr888.Gabe Black
2014-11-17x86: Fix setting segment bases in real mode.Gabe Black
2014-11-17x86: Fix some bugs in the real mode far jmp instruction.Gabe Black
2014-11-17x86: APIC: Only set deliveryStatus if our IPI is going somewhere.Gabe Black
2014-11-17x86: APIC: Fix the getRegArrayBit function.Gabe Black
2014-11-17x86: Update the stats for the x86 FS o3 boot test.Gabe Black
2014-11-16x86: Fix the CPUID Long Mode Address Size function.Gabe Black
2014-11-14config: Fix checkpoint restore in C++ config exampleAndrew Bardsley
2014-11-14arm: Fixes based on UBSan and static analysisAndreas Hansson
2014-11-14mem: Clarify unit of DRAM controller buffer sizeAndreas Hansson
2014-11-12stats: Bump regressions to match latest changesAndreas Hansson
2014-11-12mem: Delete unused variable in Garnet NetworkLinkMitch Hayenga
2014-11-12arm: Fix timing wakeup with LLSCAli Saidi
2014-11-12sim: Sort SimObject descendants and portsAndreas Hansson
2014-11-12base: Revert 9277177eccff and use getenv/setenv for UTC timeAndreas Hansson
2014-11-11stats: changes to x86 o3 fs and sparc fs regression tests.Nilay Vaish
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr
2014-11-06tests: A test program for the new mwait implementation.Marc Orr
2014-11-06cpu: Minor Draining BugAndrew Lukefahr
2014-11-06stats: updates due to changes to rubyNilay Vaish
2014-11-06ruby: provide a backing storeNilay Vaish
2014-11-06ruby: interface with classic memory controllerNilay Vaish
2014-11-06ruby: remove the function functionalReadBuffers()Nilay Vaish
2014-11-06ruby: coherence protocols: remove data block from dirctory entryNilay Vaish
2014-11-06ruby: slicc: allow adding a bool to an int, like C++.Nilay Vaish
2014-11-06ruby: remove sparse memory.Nilay Vaish
2014-11-06ruby: single physical memory in fs modeNilay Vaish
2014-11-06ruby: dma sequencer: remove RubyPort as parent classNilay Vaish
2014-11-03tests: Update stats no match.Ali Saidi
2014-10-30arm, tests: Forgot the system.terminal files for the new regressions.Ali Saidi
2014-10-29arm, tests: Add 64-bit ARM regression testsAli Saidi
2014-10-29automated mergeAli Saidi
2014-10-29tests: Update regressions for the new kernels and various preceeding fixes.Ali Saidi
2014-10-29arm, tests: Update config files to more recent kernels and create 64-bit regr...Ali Saidi
2014-10-29cpu: Add writeback modeling for drain functionalityMitch Hayenga
2014-10-29cpu: Add drain check functionality to IEWMitch Hayenga
2014-10-29arm, mem: Fix drain bug and provide drain prints for more components.Ali Saidi
2014-10-29arm: Fix multi-system AArch64 boot w/caches.Ali Saidi
2014-10-29arm: fix bare-metal memory setup.Ali Saidi
2014-10-29arm: Mark some miscregs (timer counter) registers at unverifiable.Ali Saidi
2014-10-29cpu: Add support to checker for CACHE_BLOCK_ZERO commands.Ali Saidi
2014-10-29cpu: Fix barrier push to store buffer when full bug in MinorAndrew Bardsley
2014-10-21mem: don't inhibit WriteInv's or defer snoops on their MSHRsCurtis Dunham
2014-10-29mem: have WriteInvalidate obsolete MSHRsCurtis Dunham
2014-09-02syscall_emul: add retry flag to SyscallReturnSteve Reinhardt