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AgeCommit message (Expand)Author
2006-07-07Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemKorey Sewell
2006-07-07Fix so that O3CPU doesnt segfault on exit.Korey Sewell
2006-07-06Timing cache works for hello world test.Ron Dreslinski
2006-07-06Merge zizzer:/z/m5/Bitkeeper/newmemRon Dreslinski
2006-07-06Now timing reads work in single level of cache with simple cpuRon Dreslinski
2006-07-06Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-07-06Merge zizzer:/bk/newmemAli Saidi
2006-07-06Add default responder to busAli Saidi
2006-07-06Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-07-06Support for draining, and the new method of switching out. Now switching out...Kevin Lim
2006-07-06Change the return value of drain. False means the object wasn't able to drai...Kevin Lim
2006-07-06Had to add this because for some reason gcc wasnt recognizing "THE_ISA == ALP...Korey Sewell
2006-07-06Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemKorey Sewell
2006-07-06Use O3DynInst in cpu_models.py and in static_inst_exec_sigs.hh instead of a s...Korey Sewell
2006-07-06more steps toward O3 SMTKorey Sewell
2006-07-05For now using the checkpoint or switchcpu pseudo instructions will return con...Kevin Lim
2006-07-05Remove sampler and serializer. Now they are handled through C++ interacting ...Kevin Lim
2006-07-05Rename quiesce to drain to avoid confusion with the pseudo instruction.Kevin Lim
2006-07-05Checker ignores any faults that occur in syscall emulation mode for now.Kevin Lim
2006-07-05Fix up some merge problems.Kevin Lim
2006-07-05Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-07-05Need to change state upon quiescing.Kevin Lim
2006-07-05Alphabetize traceflags, rename FullCPUAll flag to O3CPUAll.Kevin Lim
2006-07-05Split off files that are shared across the O3 and Ozone models.Kevin Lim
2006-07-05Add some different parameters. The main change is that the writeback count i...Kevin Lim
2006-07-05Fix some unset values in the request in the timing CPU.Ron Dreslinski
2006-07-03Fix for FS O3CPU compile ... missing forward class declaration/header file af...Korey Sewell
2006-07-03Added hook to check for SMT workloads. SMT is identified by adding a semicolo...Korey Sewell
2006-07-02typo ... change 'single_thread' to 'round_robin_policy'Korey Sewell
2006-07-02Fix default SMT configuration in O3CPU (i.e. fetch policy, workloads/numThreads)Korey Sewell
2006-07-01traceflag stuffKorey Sewell
2006-07-01fix cpu builder to build the correct name...Korey Sewell
2006-06-30Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemKorey Sewell
2006-06-30now O3CPU is totally independent of the ISA... all alpha specific stuff is t...Korey Sewell
2006-06-30Make O3CPU model independent of the ISAKorey Sewell
2006-06-30AtomicSimpleCPU with a cache now runs the hello world! test program.Ron Dreslinski
2006-06-30First pass, now compiles with current head of tree.Ron Dreslinski
2006-06-30Fix the packet data allocation methods. Small fixes from changesets after my...Ron Dreslinski
2006-06-30Merge zizzer:/z/m5/Bitkeeper/newmemRon Dreslinski
2006-06-30All files compile in the mem directory except cache_builderRon Dreslinski
2006-06-29Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-06-29Remove function that no longer can be used. We should figure out if we want ...Kevin Lim
2006-06-29Various fixes for the CPU models to support the features that have been moved...Kevin Lim
2006-06-29Add in support for quiescing the system, taking checkpoints, restoring from c...Kevin Lim
2006-06-29Update the readme to point people to m5.eecs.umich.eduAli Saidi
2006-06-29Still missing prefetch and tags directories as well as cache builder.Ron Dreslinski
2006-06-28More Changes, working towards cache.cc compiling. Headers cleaned up.Ron Dreslinski
2006-06-28Backing in more changsets, getting closer to compileRon Dreslinski
2006-06-28Was having difficulty with merging the cache, reverted to an early version an...Ron Dreslinski
2006-06-27change the page table from map to hash_map and create small cache to to speed...Ali Saidi
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