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AgeCommit message (Expand)Author
2019-10-29mem-cache: Use shouldAllocate() instead of CPack's decompress()Daniel R. Carvalho
2019-10-29mem-cache: Limit compression sizeDaniel R. Carvalho
2019-10-29mem-cache: Do not try to compress dataless packetsDaniel R. Carvalho
2019-10-29ext: Remove non-source files from fputilsAndreas Sandberg
2019-10-29mem: Fix DRAM controller to operate on its own address spaceNikos Nikoleris
2019-10-29mem-cache: Avoid promotion of incompatible deferred targetsNikos Nikoleris
2019-10-29mem-cache: Fix MSHR whole line write trackingNikos Nikoleris
2019-10-28configs: Update HPI to use ArmDTB and ArmITB.Gabe Black
2019-10-28configs: Fix undefined BaseCPUDaniel R. Carvalho
2019-10-28tests, base: Fixed incorrect implementation of StrTest.ToLower test.Bobby R. Bruce
2019-10-28ext: Update fputils to rev 0721843Andreas Sandberg
2019-10-25mips,riscv: Get rid of some Alpha cruft in these System classes.Gabe Black
2019-10-25cpu: Get rid of the nextInstEventCount method.Gabe Black
2019-10-25cpu: Get rid of the serviceInstCountEvents method.Gabe Black
2019-10-25fastmodel: Use getCurrentInstCount for totalInsts().Gabe Black
2019-10-25fastmodel: Implement getCurrentInstCount.Gabe Black
2019-10-25cpu: Switch off of the CPU's comInstEventQueue.Gabe Black
2019-10-25cpu: Access inst events through ThreadContext instead of the CPU.Gabe Black
2019-10-25cpu: Delegate comInstEventQueue methods to the ThreadContexts.Gabe Black
2019-10-25cpu: Make accesses to comInstEventQueue indirect through methods.Gabe Black
2019-10-25cpu,sim: Delegate PCEvent scheduling from Systems to ThreadContexts.Gabe Black
2019-10-25cpu: Make the ThreadContext a PCEventScope.Gabe Black
2019-10-25cpu,sim: Get rid of a bunch of conditional compilation for PCEvents.Gabe Black
2019-10-25cpu: Don't print the CPU name when a (Break|Panic)PCEvent happens.Gabe Black
2019-10-25cpu: Pass the address to check into the PCEventQueue service method.Gabe Black
2019-10-25sim: Make the System object a PCEventScope.Gabe Black
2019-10-25cpu: Stop checking for PC changes when servicing a PCEventQueue.Gabe Black
2019-10-25cpu: Create a PCEventScope class to abstract the scope of PCEvents.Gabe Black
2019-10-24tests: Added GTests for base/str.ccBobby R. Bruce
2019-10-24cpu, sim-se: don't wake up threads that are awake in futexCiro Santilli
2019-10-24sim-se: fix futexFunc TGT_FUTEX_WAIT always selects bitsetCiro Santilli
2019-10-23fastmodel: Add string constructors which delegate to const char * ones.Gabe Black
2019-10-23cpu: Apply the ARM TLB rework to the O3 checker CPU.Gabe Black
2019-10-23arch: Drop sysctl support if built against glibcTommaso Marinelli
2019-10-22configs: Clean setupBootLoader signatureGiacomo Travaglini
2019-10-22configs: Do not assume bootmem is a System childGiacomo Travaglini
2019-10-22dev-arm, configs: Using _on_chip_memory for on chip memoryGiacomo Travaglini
2019-10-21cpu: Apply the ARM TLB rework to the checker CPU.Gabe Black
2019-10-21misc: Add Giacomo Travaglini as an Arm maintainerAndreas Sandberg
2019-10-19cpu,arm: Push the stage 2 MMUs out of the CPU into the TLBs.Gabe Black
2019-10-19arch: Remove the "interrupts.hh" switching header file.Gabe Black
2019-10-19arch: Make a base class for Interrupts.Gabe Black
2019-10-18dev-arm: Check for gem5 extensions in GicV2Tiago Muck
2019-10-18tests: Added GTests for base/bitfield.hhBobby R. Bruce
2019-10-18arch: Get rid of the unused GenericTLB.Gabe Black
2019-10-18cpu: Turn the stage 2 ARM MMUs from params to children.Gabe Black
2019-10-18x86: Turn the local APIC Interrupts class into a SimObject.Gabe Black
2019-10-18tests: Added GTests for base/atomicio.ccBobby R. Bruce
2019-10-18base: Add classes that encapsulate a channel addressAndreas Sandberg
2019-10-18mem: Delete the MessageReq and MessageResp memory commands.Gabe Black
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