Age | Commit message (Expand) | Author |
2014-10-16 | sim: SystemC hosting | Andrew Bardsley |
2014-10-16 | sim: EventQueue wakeup on events scheduled outside the event loop | Andreas Hansson |
2014-10-16 | base: Reimplement the DPRINTF mechanism in a Logger class | Andrew Bardsley |
2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
2014-10-16 | o3: Use shared_ptr for MemDepEntry | Andreas Hansson |
2014-10-16 | mem: Use shared_ptr for Ruby Message classes | Andreas Hansson |
2014-10-16 | base: Use shared_ptr for stat Node | Andreas Hansson |
2014-10-16 | base: Transition CP annotate to use shared_ptr | Andreas Hansson |
2014-10-16 | dev: Use shared_ptr for EthPacketData | Andreas Hansson |
2014-10-16 | dev: Use shared_ptr for Arguments::Data | Andreas Hansson |
2014-10-16 | arch,x86,mem: Dynamically determine the ISA for Ruby store check | Andreas Hansson |
2014-10-16 | mem: Dynamically determine page bytes in memory components | Andreas Hansson |
2014-10-16 | arm: Add helper methods to setup architected PMU events | Andreas Sandberg |
2014-10-16 | cpu: Probe points for basic PMU stats | Andreas Sandberg |
2014-10-16 | arm: Add TLB PMU probes | Andreas Sandberg |
2014-10-16 | cpu: Add branch predictor PMU probe points | Andreas Sandberg |
2014-10-16 | arm: Add a model of an ARM PMUv3 | Andreas Sandberg |
2014-10-16 | sim: Add typedefs for PMU probe points | Andreas Sandberg |
2014-10-16 | sim: Add support for serializing BitUnionXX | Andreas Sandberg |
2014-10-16 | config: Add the ability to read a config file using C++ and Python | Andreas Hansson |
2014-10-16 | scons: Add Undefined Behavior Sanitizer (UBSan) option | Andreas Hansson |
2014-09-22 | scons: Add --without-tcmalloc build option | Curtis Dunham |
2014-08-12 | scons: Generate a single debug flag C++ file | Curtis Dunham |
2014-10-16 | scons: create dummy target to have SWIG generate C++ classes | Curtis Dunham |
2014-10-16 | config: Add a --without-python option to build process | Andrew Bardsley |
2014-10-16 | stats: Small bump of trailing stats | Andreas Hansson |
2014-10-11 | stats: updates due to changes to x86, stale configs. | Nilay Vaish |
2014-10-11 | cpu: Fix o3 SMT IQCount bug | Andrew Lukefahr |
2014-10-11 | util: adds a script for using DSENT | Nilay Vaish |
2014-10-11 | ext: dsent: adds a Python interface, drops C++ one | Nilay Vaish |
2014-10-11 | ext: add the source code for DSENT | Nilay Vaish |
2014-10-11 | ruby: network: garnet: add statistics for different activities | Nilay Vaish |
2014-10-11 | ruby: network: garnet: remove functions for computing power | Nilay Vaish |
2014-10-11 | ruby: drop Orion network power model | Nilay Vaish |
2014-10-11 | ruby: mesi: slight renaming | Nilay Vaish |
2014-10-11 | config: separate function for instantiating a memory controller | Nilay Vaish |
2014-10-11 | ruby: structures: coorect #ifndef macros in header files | Nilay Vaish |
2014-10-11 | ruby: moesi hammer: correct typo in master-slave assignment | Nilay Vaish |
2014-06-13 | x86: add LongModeAddressSize function to cpuid | Jiuyue Ma |
2014-07-17 | config, x86: Ensure that PCI devs get bridged to the memory bus | Jiuyue Ma |
2014-07-17 | config, x86: swap bus_id of ISA/PCI in X86 IntelMPTable | Jiuyue Ma |
2014-10-11 | sim: draining bug for fast-forwaring multiple cores | Andrew Lukefahr |
2014-10-11 | base: addr range: slight change to validity check | Nilay Vaish |
2014-10-11 | base: misc: Add missing header file. | Nilay Vaish |
2014-10-09 | stats: Add DRAM power statistics to reference output | Andreas Hansson |
2014-07-29 | mem: DRAMPower integration for on-line DRAM power stats | Omar Naji |
2014-07-29 | mem: Add DRAMPower wrapping class | Omar Naji |
2014-07-25 | mem: Add missig timing and current parameters to DRAM configs | Omar Naji |
2014-10-09 | mem: Remove DRAMSim2 DDR3 configuration | Omar Naji |
2014-10-09 | ext: Add DRAMPower to enable on-line DRAM power modelling | Andreas Hansson |