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AgeCommit message (Expand)Author
2019-10-07configs: Isolate ISA related object listsDaniel R. Carvalho
2019-10-07kvm, arm: fix the size of MISCREG_FPSR and MISCREG_FPCRCiro Santilli
2019-10-07config: skip access to branchPred in ARM KVMCiro Santilli
2019-10-05base: ELF segment types are not bitfields.Gabe Black
2019-10-04kvm: Rename gettid() to build with glibc 2.30+Tommaso Marinelli
2019-10-03mem: Remove unused variableTommaso Marinelli
2019-10-03tests: Fix a minor bug in fixture.pyAyaz Akram
2019-10-03dev, misc: Fixing "may be used unitialized" compilation errorBobby R. Bruce
2019-10-03sim-se: Fix invalid delete of params on cloneJason Lowe-Power
2019-10-03arch-arm: Annotate CM flag in AA64 CM InstructionsGiacomo Travaglini
2019-10-03arch-arm: Set CM bit in DataAbortGiacomo Travaglini
2019-10-02sim: Mark System::getThreadContext method as constGiacomo Travaglini
2019-10-02dev-arm: Improve fault message on SMMUv3 translation faultMarc Mari Barcelo
2019-10-02dev-arm: Fix address used to update the SMMUv3 Walk CacheMarc Mari Barcelo
2019-10-02arch-arm: Create helper for sending events (SEV)Giacomo Travaglini
2019-10-02fastmodel: Get rid of the back channel mem port in FastModel::ArmCPU.Gabe Black
2019-10-02fastmodel: Implement a custom sendFunctional for CortexA76x1.Gabe Black
2019-10-02x86: Switch from MessageReq and Resp to WriteReq and Resp.Gabe Black
2019-10-02fastmodel: Let the EVS set an attribute for getSendFunctional to return.Gabe Black
2019-10-01style: normalize filename in SortedIncludes.fix()Georg Kotheimer
2019-10-01fastmodel: Add a gem5Cpu attribute to the CortexA76x1.Gabe Black
2019-10-01fastmodel: Add a utility class which makes it easier to watch signals.Gabe Black
2019-10-01fastmodel: Pull out and simplify the interrupt mechanism in the GIC.Gabe Black
2019-10-01mem-cache: Fix invalid whenReadyDaniel R. Carvalho
2019-10-01configs: Port PlatformConfig to the common object listDaniel R. Carvalho
2019-10-01configs: Port MemConfig to the common object listDaniel R. Carvalho
2019-10-01configs: Port HWPConfig to the common object listDaniel R. Carvalho
2019-10-01configs: Port BPConfig to use the common object listDaniel R. Carvalho
2019-09-30configs: Port CPUConfig to use the common object listDaniel R. Carvalho
2019-09-30configs: Create a basic ObjectListDaniel R. Carvalho
2019-09-30configs: Remove is_atomic_cpu checkDaniel R. Carvalho
2019-09-30mem-ruby: Remove inexistent functions from UtilDaniel R. Carvalho
2019-09-30mem-ruby: Make bitSelect use bits<Addr>Daniel R. Carvalho
2019-09-30mem-ruby: Fix maskLowOrderBitsDaniel R. Carvalho
2019-09-30mem-ruby: Remove shiftLowOrderBitsDaniel R. Carvalho
2019-09-30mem-ruby: Remove maskHighOrderBitsDaniel R. Carvalho
2019-09-30mem-ruby: Remove bitRemoveDaniel R. Carvalho
2019-09-30cpu: Make use of DRAMCtrl::AddrMap in the traffic generatorsNikos Nikoleris
2019-09-30misc: Added line wrapping functionality for Sim-Object descBobby R. Bruce
2019-09-30mem: Use new-style stats in the XBar modelsAndreas Sandberg
2019-09-30mem-cache: Switch to new-style statsAndreas Sandberg
2019-09-30mem: Convert DRAM controller to new-style statsAndreas Sandberg
2019-09-28ruby: 2x protocols has typo/syntax error that fails buildingTimothy Hayes
2019-09-27fastmodel: Add glue code which adapts fastmodels to run in gem5.Gabe Black
2019-09-26sim: Convert power modelling framework to new-style statsAndreas Sandberg
2019-09-26stats: Add a preDumpStats() callback to Stats::GroupAndreas Sandberg
2019-09-26stats: Don't output index in vectors of length 1Andreas Sandberg
2019-09-26stats: Correctly print new-style dist stat namesAndreas Sandberg
2019-09-25mem-ruby: prevent cacheProbe being called multiple timesJing Qu
2019-09-24ext: Updated Pybind11 to version 2.4.1.Bobby R. Bruce
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