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AgeCommit message (Expand)Author
2019-10-02fastmodel: Implement a custom sendFunctional for CortexA76x1.Gabe Black
2019-10-02x86: Switch from MessageReq and Resp to WriteReq and Resp.Gabe Black
2019-10-02fastmodel: Let the EVS set an attribute for getSendFunctional to return.Gabe Black
2019-10-01style: normalize filename in SortedIncludes.fix()Georg Kotheimer
2019-10-01fastmodel: Add a gem5Cpu attribute to the CortexA76x1.Gabe Black
2019-10-01fastmodel: Add a utility class which makes it easier to watch signals.Gabe Black
2019-10-01fastmodel: Pull out and simplify the interrupt mechanism in the GIC.Gabe Black
2019-10-01mem-cache: Fix invalid whenReadyDaniel R. Carvalho
2019-10-01configs: Port PlatformConfig to the common object listDaniel R. Carvalho
2019-10-01configs: Port MemConfig to the common object listDaniel R. Carvalho
2019-10-01configs: Port HWPConfig to the common object listDaniel R. Carvalho
2019-10-01configs: Port BPConfig to use the common object listDaniel R. Carvalho
2019-09-30configs: Port CPUConfig to use the common object listDaniel R. Carvalho
2019-09-30configs: Create a basic ObjectListDaniel R. Carvalho
2019-09-30configs: Remove is_atomic_cpu checkDaniel R. Carvalho
2019-09-30mem-ruby: Remove inexistent functions from UtilDaniel R. Carvalho
2019-09-30mem-ruby: Make bitSelect use bits<Addr>Daniel R. Carvalho
2019-09-30mem-ruby: Fix maskLowOrderBitsDaniel R. Carvalho
2019-09-30mem-ruby: Remove shiftLowOrderBitsDaniel R. Carvalho
2019-09-30mem-ruby: Remove maskHighOrderBitsDaniel R. Carvalho
2019-09-30mem-ruby: Remove bitRemoveDaniel R. Carvalho
2019-09-30cpu: Make use of DRAMCtrl::AddrMap in the traffic generatorsNikos Nikoleris
2019-09-30misc: Added line wrapping functionality for Sim-Object descBobby R. Bruce
2019-09-30mem: Use new-style stats in the XBar modelsAndreas Sandberg
2019-09-30mem-cache: Switch to new-style statsAndreas Sandberg
2019-09-30mem: Convert DRAM controller to new-style statsAndreas Sandberg
2019-09-28ruby: 2x protocols has typo/syntax error that fails buildingTimothy Hayes
2019-09-27fastmodel: Add glue code which adapts fastmodels to run in gem5.Gabe Black
2019-09-26sim: Convert power modelling framework to new-style statsAndreas Sandberg
2019-09-26stats: Add a preDumpStats() callback to Stats::GroupAndreas Sandberg
2019-09-26stats: Don't output index in vectors of length 1Andreas Sandberg
2019-09-26stats: Correctly print new-style dist stat namesAndreas Sandberg
2019-09-25mem-ruby: prevent cacheProbe being called multiple timesJing Qu
2019-09-24ext: Updated Pybind11 to version 2.4.1.Bobby R. Bruce
2019-09-24cpu: Fix checker cpu instantiationNikos Nikoleris
2019-09-23cpu, mem: Changing AtomicOpFunctor* for unique_ptr<AtomicOpFunctor>Jordi Vaquero
2019-09-21mem: Delete the now unused Message*Port classes.Gabe Black
2019-09-21x86: Templatize the IntMasterPort.Gabe Black
2019-09-21x86: Templatize IntSlavePort.Gabe Black
2019-09-21x86: Turn the local APIC into a PioDevice instead of a BasicPioDevice.Gabe Black
2019-09-20gpu-compute: Fix overriden errorsJing Qu
2019-09-20dev, x86: Delete the now unused X86 specific interrupt pins/lines.Gabe Black
2019-09-20dev, x86: Convert x86 devices to the generic int pins.Gabe Black
2019-09-20arch-x86: ignore non-temporal hint for movntps/movntpd SSE instsPouya Fotouhi
2019-09-19dev: Terminal output's dump name conflictsAndrea Mondelli
2019-09-19arch-x86: Change warn to warn_once for NT instructionsHoa Nguyen
2019-09-19python: Don't try to bind a stat group to the NULL simobject.Gabe Black
2019-09-19misc: Update MAINTAINERSJason Lowe-Power
2019-09-19dev-arm: Conditionally enable HDLcd when doing DTB autogenGiacomo Travaglini
2019-09-19dev-arm: Add HDLcd DTB autogenerationGiacomo Travaglini
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