gem5 - gem5

Age	Commit message (Expand)	Author
2006-05-16	Split SimpleCPU into two different models, AtomicSimpleCPU and	Steve Reinhardt
2006-03-28	Make .isa-file ##include file paths relative to including file.	Steve Reinhardt
2006-03-09	Hand merge. Stuff probably doesn't compile.	Gabe Black
2006-03-03	Changes to support automatic renaming of the shadow registers at decode time....	Kevin Lim
2006-02-27	Changes to put all the misc regs within the misc reg file. This includes the...	Kevin Lim
2006-02-21	Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old...	Gabe Black
2006-02-19	Changes to untemplate StaticInst and StaticInstPtr, change the isa to a names...	Gabe Black
2006-02-16	Merge gblack@m5.eecs.umich.edu:/bk/multiarch	Gabe Black
2006-02-16	Changed the fault enum into a class, and fixed everything up to work with it....	Gabe Black
2006-02-14	Fixed a path in the alpha isa description.	Gabe Black
2006-02-12	Pseudo instructions are now passed whatever instructions they need by the dec...	Gabe Black
2006-02-12	Polishing of isa_parser.py internal operand handling, resulting in	Steve Reinhardt
2006-02-09	Split Alpha ISA description into multiple files	Steve Reinhardt
2006-02-08	Moved the alpha isa_desc to conform to the new naming system.	Gabe Black