gem5 - gem5

Age	Commit message (Expand)	Author
2006-05-16	Split SimpleCPU into two different models, AtomicSimpleCPU and	Steve Reinhardt
2006-03-28	Use op_decl instead of op_src_decl + op_dest_decl in .isa templates.	Steve Reinhardt
2006-03-03	Changes to support automatic renaming of the shadow registers at decode time....	Kevin Lim
2006-02-21	Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old...	Gabe Black
2006-02-19	Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5	Gabe Black
2006-02-19	Changes to untemplate StaticInst and StaticInstPtr, change the isa to a names...	Gabe Black
2006-02-16	Merge ktlim@zizzer:/bk/m5	Kevin Lim
2006-02-16	Fixes to handle generating the initiateAcc and completeAcc functions a little...	Kevin Lim
2006-02-16	Some changes which weren't needed before doing a bk pull were needed afterwar...	Gabe Black
2006-02-16	Merge gblack@m5.eecs.umich.edu:/bk/multiarch	Gabe Black
2006-02-16	Changed the fault enum into a class, and fixed everything up to work with it....	Gabe Black
2006-02-15	Gives separate methods for initiating and completing a memory access, which w...	Kevin Lim
2006-02-11	Add keyword parameters and list-valued arguments to	Steve Reinhardt
2006-02-10	Change how memory operands are handled in ISA descriptions.	Steve Reinhardt
2006-02-09	Split Alpha ISA description into multiple files	Steve Reinhardt